 (   8 H   (                                                                   '   ti,dra7-evm ti,dra742 ti,dra74 ti,dra7           &         
   7TI DRA742      chosen        aliases          =/ocp/i2c@48070000            B/ocp/i2c@48072000            G/ocp/i2c@48060000            L/ocp/i2c@4807a000            Q/ocp/i2c@4807c000            V/ocp/serial@4806a000             ^/ocp/serial@4806c000             f/ocp/serial@48020000             n/ocp/serial@4806e000             v/ocp/serial@48066000             ~/ocp/serial@48068000             /ocp/serial@48420000             /ocp/serial@48422000             /ocp/serial@48424000             /ocp/serial@4ae2b000          &   /ocp/ethernet@48484000/slave@48480200         &   /ocp/ethernet@48484000/slave@48480300            /ocp/can@481cc000            /ocp/can@481d0000            /ocp/ipu@58820000            /ocp/ipu@55020000            /ocp/dsp@40800000            /ocp/dsp@41000000         	   /display             /connector@1          	   /sound@0          #   /ocp/dss@58000000/encoder@58060000           /ocp/i2c@48072000/serializer@1b       ,  	/ocp/i2c@48072000/serializer@1b/tlc59108@1c       memory          memory                     `         timer            arm,armv7-timer       0  "                              
           &         interrupt-controller@48211000            arm,cortex-a15-gic           -        B         @      H!            H!             H!@             H!`                 "      	           &           S           Y         interrupt-controller@48281000         &   ti,omap5-wugen-mpu ti,omap4-wugen-mpu            -        B               H(                 &           S           Y         cpus                                 cpu@0           cpu          arm,cortex-a15                      a           u                                                      cpu                                                    S  E        Y  E      cpu@1           cpu          arm,cortex-a15                     a            opp_table0           operating-points-v2                  S           Y      opp_nom@1000000000              ;          , P 0                       '      opp_od@1176000000               FV          @  @                    opp_high@1500000000             Yh/          v ~                        soc          ti,omap-infra      mpu          ti,omap5-mpu            3mpu          ocp          ti,dra7-l3-noc simple-bus                                    =                       3l3_main_1 l3_main_2              D              E                   D                       
      l4@4a000000          ti,dra7-l4-cfg simple-bus                                    =    J    "    scm@2000             ti,dra7-scm-core simple-bus                                                  =               scm_conf@0           syscon simple-bus                                                   =                   S           Y      pbias_regulator          ti,pbias-dra7 ti,pbias-omap                       X      pbias_mmc_omap5         _pbias_mmc_omap5         n w@         -        S           Y            clocks                               dss_deshdcp_clk                      ti,gate-clock              	                      X      sys_32k_ck                       ti,mux-clock               
                                      S   P        Y   P      ehrpwm0_tbclk                        ti,gate-clock                                   X        S  :        Y  :      ehrpwm1_tbclk                        ti,gate-clock                                   X        S  ;        Y  ;      ehrpwm2_tbclk                        ti,gate-clock                                   X        S  <        Y  <            pinmux@1400          ti,dra7-padconf pinctrl-single               h                                  B            -                    ?        S           Y      dcan1_pins_default                           S  -        Y  -      dcan1_pins_sleep                            S  ,        Y  ,      pinmux_hdmi_i2c_sel_pin                     S  N        Y  N      pinmux_hdmi_i2c_pins_default                              S  O        Y  O      pinmux_hdmi_i2c_pins_ddc                            S  P        Y  P      pinmux_mmc1_default_pins          0    T     X     \     `     d     h           S           Y         pinmux_mmc1_sdr12_pins        0    T     X     \     `     d     h           S           Y         pinmux_mmc1_hs_pins       0    T   X   \   `   d   h         S           Y         pinmux_mmc1_sdr25_pins        0    T   X   \   `   d   h         S           Y         pinmux_mmc1_sdr50_pins        0    T   X   \   `   d   h         S           Y         pinmux_mmc1_ddr50_pins        0    T    X    \    `    d    h          S           Y         pinmux_mmc1_sdr104_pins       0    T    X    \    `    d    h          S           Y         mmc2_pins_default         P                                                            S           Y         mmc2_pins_hs          P                                                            S           Y         pinmux_mmc2_ddr_1_8v_pins         P                                                  S           Y         mmc2_pins_hs200_1_8v          P                                                  S           Y         mmc4_pins_default         0                            S           Y         mmc4_pins_hs          0                            S           Y         mmc4_pins_sdr12       0                            S           Y         mmc4_pins_sdr25       0                            S           Y            scm_conf@1c04            syscon                        S           Y         scm_conf@1c24            syscon            $   $        S          Y        dma-router@b78           ti,dra7-dma-crossbar              x                                             /           S           Y         dma-router@c78           ti,dra7-dma-crossbar              x   |                                          /           S           Y            cm_core_aon@5000             ti,dra7-cm-core-aon           P        clocks                               atl_clkin0_ck                        ti,dra7-atl-clock                      S   C        Y   C      atl_clkin1_ck                        ti,dra7-atl-clock                      S   B        Y   B      atl_clkin2_ck                        ti,dra7-atl-clock                      S   A        Y   A      atl_clkin3_ck                        ti,dra7-atl-clock                      S   @        Y   @      hdmi_clkin_ck                        fixed-clock         ;            S   /        Y   /      mlb_clkin_ck                         fixed-clock         ;            S           Y         mlbp_clkin_ck                        fixed-clock         ;            S           Y         pciesref_acs_clk_ck                      fixed-clock         ;         S   Z        Y   Z      ref_clkin0_ck                        fixed-clock         ;            S   E        Y   E      ref_clkin1_ck                        fixed-clock         ;            S   F        Y   F      ref_clkin2_ck                        fixed-clock         ;            S   G        Y   G      ref_clkin3_ck                        fixed-clock         ;            S   H        Y   H      rmii_clk_ck                      fixed-clock         ;            S   q        Y   q      sdvenc_clkin_ck                      fixed-clock         ;          secure_32k_clk_src_ck                        fixed-clock         ;           S           Y         sys_clk32_crystal_ck                         fixed-clock         ;           S   
        Y   
      sys_clk32_pseudo_ck                      fixed-factor-clock                     K           V  b        S           Y         virt_12000000_ck                         fixed-clock         ;          S           Y         virt_13000000_ck                         fixed-clock         ; ]@      virt_16800000_ck                         fixed-clock         ; Y         S           Y         virt_19200000_ck                         fixed-clock         ;$         S           Y         virt_20000000_ck                         fixed-clock         ;1-         S           Y         virt_26000000_ck                         fixed-clock         ;        S           Y         virt_27000000_ck                         fixed-clock         ;        S           Y         virt_38400000_ck                         fixed-clock         ;I         S           Y         sys_clkin2                       fixed-clock         ;X         S   D        Y   D      usb_otg_clkin_ck                         fixed-clock         ;            S           Y         video1_clkin_ck                      fixed-clock         ;            S   9        Y   9      video1_m2_clkin_ck                       fixed-clock         ;            S   .        Y   .      video2_clkin_ck                      fixed-clock         ;            S   :        Y   :      video2_m2_clkin_ck                       fixed-clock         ;            S   -        Y   -      dpll_abe_ck                      ti,omap4-dpll-m4xen-clock                                         S           Y         dpll_abe_x2_ck                       ti,omap4-dpll-x2-clock                     S           Y         dpll_abe_m2x2_ck                         ti,divider-clock                       `           k                      }                 S           Y         abe_clk                      ti,divider-clock                       `                              S           Y         dpll_abe_m2_ck                       ti,divider-clock                       `           k                      }                 S   o        Y   o      dpll_abe_m3x2_ck                         ti,divider-clock                       `           k                      }                 S           Y         dpll_core_byp_mux                        ti,mux-clock                                       ,        S           Y         dpll_core_ck                         ti,omap4-dpll-core-clock                               $  ,  (        S           Y         dpll_core_x2_ck                      ti,omap4-dpll-x2-clock                     S           Y         dpll_core_h12x2_ck                       ti,divider-clock                       `   ?        k             <         }                 S           Y         mpu_dpll_hs_clk_div                      fixed-factor-clock                     K           V           S           Y         dpll_mpu_ck                      ti,omap5-mpu-dpll-clock                         `  d  l  h        S           Y         dpll_mpu_m2_ck                       ti,divider-clock                       `           k             p         }                 S           Y         mpu_dclk_div                         fixed-factor-clock                     K           V           S           Y         dsp_dpll_hs_clk_div                      fixed-factor-clock                     K           V           S           Y         dpll_dsp_byp_mux                         ti,mux-clock                                       @        S           Y         dpll_dsp_ck                      ti,omap4-dpll-clock                         4  8  @  <                   #F         S           Y         dpll_dsp_m2_ck                       ti,divider-clock                       `           k             D         }                             #F         S            Y          iva_dpll_hs_clk_div                      fixed-factor-clock                     K           V           S   !        Y   !      dpll_iva_byp_mux                         ti,mux-clock                  !                             S   "        Y   "      dpll_iva_ck                      ti,omap4-dpll-clock               "                           #        Ep}@        S   #        Y   #      dpll_iva_m2_ck                       ti,divider-clock               #        `           k                      }                    $        %        S   $        Y   $      iva_dclk                         fixed-factor-clock             $        K           V           S           Y         dpll_gpu_byp_mux                         ti,mux-clock                                               S   %        Y   %      dpll_gpu_ck                      ti,omap4-dpll-clock               %                           &        Ly@        S   &        Y   &      dpll_gpu_m2_ck                       ti,divider-clock               &        `           k                      }                    '        _(k        S   '        Y   '      dpll_core_m2_ck                      ti,divider-clock                       `           k             0         }                 S   (        Y   (      core_dpll_out_dclk_div                       fixed-factor-clock             (        K           V           S           Y         dpll_ddr_byp_mux                         ti,mux-clock                                               S   )        Y   )      dpll_ddr_ck                      ti,omap4-dpll-clock               )                        S   *        Y   *      dpll_ddr_m2_ck                       ti,divider-clock               *        `           k                       }                 S           Y         dpll_gmac_byp_mux                        ti,mux-clock                                               S   +        Y   +      dpll_gmac_ck                         ti,omap4-dpll-clock               +                        S   ,        Y   ,      dpll_gmac_m2_ck                      ti,divider-clock               ,        `           k                      }                 S           Y         video2_dclk_div                      fixed-factor-clock             -        K           V           S           Y         video1_dclk_div                      fixed-factor-clock             .        K           V           S           Y         hdmi_dclk_div                        fixed-factor-clock             /        K           V           S           Y         per_dpll_hs_clk_div                      fixed-factor-clock                     K           V           S   ^        Y   ^      usb_dpll_hs_clk_div                      fixed-factor-clock                     K           V           S   b        Y   b      eve_dpll_hs_clk_div                      fixed-factor-clock                     K           V           S   0        Y   0      dpll_eve_byp_mux                         ti,mux-clock                  0                             S   1        Y   1      dpll_eve_ck                      ti,omap4-dpll-clock               1                        S   2        Y   2      dpll_eve_m2_ck                       ti,divider-clock               2        `           k                      }                 S   3        Y   3      eve_dclk_div                         fixed-factor-clock             3        K           V           S           Y         dpll_core_h13x2_ck                       ti,divider-clock                       `   ?        k             @         }               dpll_core_h14x2_ck                       ti,divider-clock                       `   ?        k             D         }                 S   r        Y   r      dpll_core_h22x2_ck                       ti,divider-clock                       `   ?        k             T         }                 S   ;        Y   ;      dpll_core_h23x2_ck                       ti,divider-clock                       `   ?        k             X         }                 S   ~        Y   ~      dpll_core_h24x2_ck                       ti,divider-clock                       `   ?        k             \         }                 S           Y         dpll_ddr_x2_ck                       ti,omap4-dpll-x2-clock             *        S   4        Y   4      dpll_ddr_h11x2_ck                        ti,divider-clock               4        `   ?        k             (         }               dpll_dsp_x2_ck                       ti,omap4-dpll-x2-clock                     S   5        Y   5      dpll_dsp_m3x2_ck                         ti,divider-clock               5        `           k             H         }                    6        ׄ         S   6        Y   6      dpll_gmac_x2_ck                      ti,omap4-dpll-x2-clock             ,        S   7        Y   7      dpll_gmac_h11x2_ck                       ti,divider-clock               7        `   ?        k                      }                 S   8        Y   8      dpll_gmac_h12x2_ck                       ti,divider-clock               7        `   ?        k                      }               dpll_gmac_h13x2_ck                       ti,divider-clock               7        `   ?        k                      }                 S           Y         dpll_gmac_m3x2_ck                        ti,divider-clock               7        `           k                      }               gmii_m_clk_div                       fixed-factor-clock             8        K           V         hdmi_clk2_div                        fixed-factor-clock             /        K           V           S   N        Y   N      hdmi_div_clk                         fixed-factor-clock             /        K           V           S   T        Y   T      l3_iclk_div                      ti,divider-clock            `                                                     S   	        Y   	      l4_root_clk_div                      fixed-factor-clock             	        K           V           S           Y         video1_clk2_div                      fixed-factor-clock             9        K           V           S   L        Y   L      video1_div_clk                       fixed-factor-clock             9        K           V           S   R        Y   R      video2_clk2_div                      fixed-factor-clock             :        K           V           S   M        Y   M      video2_div_clk                       fixed-factor-clock             :        K           V           S   S        Y   S      ipu1_gfclk_mux                       ti,mux-clock                  ;                                 <           ;        S   <        Y   <      mcasp1_ahclkr_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                     P        S          Y        mcasp1_ahclkx_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                     P        S          Y        mcasp1_aux_gfclk_mux                         ti,mux-clock               K   L   M   N                     P        S          Y        timer5_gfclk_mux                         ti,mux-clock          0     O   P   D   E   F   G   H   Q   R   S   T   U                     X      timer6_gfclk_mux                         ti,mux-clock          0     O   P   D   E   F   G   H   Q   R   S   T   U                     `      timer7_gfclk_mux                         ti,mux-clock          0     O   P   D   E   F   G   H   Q   R   S   T   U                     h      timer8_gfclk_mux                         ti,mux-clock          0     O   P   D   E   F   G   H   Q   R   S   T   U                     p      uart6_gfclk_mux                      ti,mux-clock               V   W                           dummy_ck                         fixed-clock         ;             clockdomains             cm_core@8000             ti,dra7-cm-core              0    clocks                               dpll_pcie_ref_ck                         ti,omap4-dpll-clock                                        S   X        Y   X      dpll_pcie_ref_m2ldo_ck                       ti,divider-clock               X        `           k                      }                 S   Y        Y   Y      apll_pcie_in_clk_mux@4ae06118            ti,mux-clock               Y   Z                                            S   [        Y   [      apll_pcie_ck                         ti,dra7-apll-clock             [   X                     S   \        Y   \      optfclk_pciephy1_32khz@4a0093b0          ti,gate-clock              P                                         S          Y        optfclk_pciephy2_32khz@4a0093b8          ti,gate-clock              P                                         S          Y        optfclk_pciephy_div@4a00821c             ti,divider-clock               \                                                       `           S   ]        Y   ]      optfclk_pciephy1_clk@4a0093b0            ti,gate-clock              \                                 	        S          Y        optfclk_pciephy2_clk@4a0093b8            ti,gate-clock              \                                 	        S          Y        optfclk_pciephy1_div_clk@4a0093b0            ti,gate-clock              ]                                 
        S          Y        optfclk_pciephy2_div_clk@4a0093b8            ti,gate-clock              ]                                 
        S          Y        apll_pcie_clkvcoldo                      fixed-factor-clock             \        K           V         apll_pcie_clkvcoldo_div                      fixed-factor-clock             \        K           V         apll_pcie_m2_ck                      fixed-factor-clock             \        K           V           S           Y         dpll_per_byp_mux                         ti,mux-clock                  ^                     L        S   _        Y   _      dpll_per_ck                      ti,omap4-dpll-clock               _          @  D  L  H        S   `        Y   `      dpll_per_m2_ck                       ti,divider-clock               `        `           k             P         }                 S   a        Y   a      func_96m_aon_dclk_div                        fixed-factor-clock             a        K           V           S           Y         dpll_usb_byp_mux                         ti,mux-clock                  b                             S   c        Y   c      dpll_usb_ck                      ti,omap4-dpll-j-type-clock                c                        S   d        Y   d      dpll_usb_m2_ck                       ti,divider-clock               d        `           k                      }                 S   g        Y   g      dpll_pcie_ref_m2_ck                      ti,divider-clock               X        `           k                      }                 S           Y         dpll_per_x2_ck                       ti,omap4-dpll-x2-clock             `        S   e        Y   e      dpll_per_h11x2_ck                        ti,divider-clock               e        `   ?        k             X         }                 S   f        Y   f      dpll_per_h12x2_ck                        ti,divider-clock               e        `   ?        k             \         }                 S   j        Y   j      dpll_per_h13x2_ck                        ti,divider-clock               e        `   ?        k             `         }                 S   |        Y   |      dpll_per_h14x2_ck                        ti,divider-clock               e        `   ?        k             d         }                 S   s        Y   s      dpll_per_m2x2_ck                         ti,divider-clock               e        `           k             P         }                 S   W        Y   W      dpll_usb_clkdcoldo                       fixed-factor-clock             d        K           V           S   i        Y   i      func_128m_clk                        fixed-factor-clock             f        K           V           S   w        Y   w      func_12m_fclk                        fixed-factor-clock             W        K           V         func_24m_clk                         fixed-factor-clock             a        K           V           S   ?        Y   ?      func_48m_fclk                        fixed-factor-clock             W        K           V           S   V        Y   V      func_96m_fclk                        fixed-factor-clock             W        K           V         l3init_60m_fclk                      ti,divider-clock               g                              clkout2_clk                      ti,gate-clock              h                           l3init_960m_gfclk                        ti,gate-clock              i                             S   n        Y   n      dss_32khz_clk                        ti,gate-clock              P                            dss_48mhz_clk                        ti,gate-clock              V           	                   S  2        Y  2      dss_dss_clk                      ti,gate-clock              j                               	        S  .        Y  .      dss_hdmi_clk                         ti,gate-clock              k           
                   S  3        Y  3      dss_video1_clk                       ti,gate-clock              l                              S  /        Y  /      dss_video2_clk                       ti,gate-clock              m                              S  0        Y  0      gpio2_dbclk                      ti,gate-clock              P                     `      gpio3_dbclk                      ti,gate-clock              P                     h      gpio4_dbclk                      ti,gate-clock              P                     p      gpio5_dbclk                      ti,gate-clock              P                     x      gpio6_dbclk                      ti,gate-clock              P                           gpio7_dbclk                      ti,gate-clock              P                           gpio8_dbclk                      ti,gate-clock              P                           mmc1_clk32k                      ti,gate-clock              P                     (      mmc2_clk32k                      ti,gate-clock              P                     0      mmc3_clk32k                      ti,gate-clock              P                            mmc4_clk32k                      ti,gate-clock              P                     (      sata_ref_clk                         ti,gate-clock                                           S           Y         usb_otg_ss1_refclk960m                       ti,gate-clock              n                             S  
        Y  
      usb_otg_ss2_refclk960m                       ti,gate-clock              n                     @        S          Y        usb_phy1_always_on_clk32k                        ti,gate-clock              P                     @        S  	        Y  	      usb_phy2_always_on_clk32k                        ti,gate-clock              P                             S          Y        usb_phy3_always_on_clk32k                        ti,gate-clock              P                             S          Y        atl_dpll_clk_mux                         ti,mux-clock               P   9   :   /                              S   p        Y   p      atl_gfclk_mux                        ti,mux-clock               	   o   p                              S           Y         rmii_50mhz_clk_mux@13d0                      ti,mux-clock               8   q                           gmac_rft_clk_mux                         ti,mux-clock               9   :   o   /   	                             S  )        Y  )      gpu_core_gclk_mux                        ti,mux-clock               r   s   '                                 t           '        S   t        Y   t      gpu_hyd_gclk_mux                         ti,mux-clock               r   s   '                                 u           '        S   u        Y   u      l3instr_ts_gclk_div                      ti,divider-clock               v                     P                        mcasp2_ahclkr_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                     `        S          Y        mcasp2_ahclkx_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                     `        S          Y        mcasp2_aux_gfclk_mux                         ti,mux-clock               K   L   M   N                     `        S          Y        mcasp3_ahclkx_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                     h        S          Y        mcasp3_aux_gfclk_mux                         ti,mux-clock               K   L   M   N                     h        S          Y        mcasp4_ahclkx_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                             S          Y        mcasp4_aux_gfclk_mux                         ti,mux-clock               K   L   M   N                             S          Y        mcasp5_ahclkx_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                     x        S  !        Y  !      mcasp5_aux_gfclk_mux                         ti,mux-clock               K   L   M   N                     x        S           Y         mcasp6_ahclkx_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                             S  #        Y  #      mcasp6_aux_gfclk_mux                         ti,mux-clock               K   L   M   N                             S  "        Y  "      mcasp7_ahclkx_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                             S  %        Y  %      mcasp7_aux_gfclk_mux                         ti,mux-clock               K   L   M   N                             S  $        Y  $      mcasp8_ahclkx_mux                        ti,mux-clock          8     =   >   ?   @   A   B   C   D   E   F   G   H   I   J                             S  '        Y  '      mcasp8_aux_gfclk_mux                         ti,mux-clock               K   L   M   N                             S  &        Y  &      mmc1_fclk_mux                        ti,mux-clock               w   W                     (        S   x        Y   x      mmc1_fclk_div                        ti,divider-clock               x                   `             (               mmc2_fclk_mux                        ti,mux-clock               w   W                     0        S   y        Y   y      mmc2_fclk_div                        ti,divider-clock               y                   `             0               mmc3_gfclk_mux                       ti,mux-clock               V   W                              S   z        Y   z      mmc3_gfclk_div                       ti,divider-clock               z                   `                             mmc4_gfclk_mux                       ti,mux-clock               V   W                     (        S   {        Y   {      mmc4_gfclk_div                       ti,divider-clock               {                   `             (               qspi_gfclk_mux                       ti,mux-clock               w   |                     8        S   }        Y   }      qspi_gfclk_div                       ti,divider-clock               }                   `             8                 S           Y         timer10_gfclk_mux                        ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                     (      timer11_gfclk_mux                        ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                     0      timer13_gfclk_mux                        ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                           timer14_gfclk_mux                        ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                           timer15_gfclk_mux                        ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                           timer16_gfclk_mux                        ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                     0      timer2_gfclk_mux                         ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                     8      timer3_gfclk_mux                         ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                     @      timer4_gfclk_mux                         ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                     H      timer9_gfclk_mux                         ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                     P      uart1_gfclk_mux                      ti,mux-clock               V   W                     @      uart2_gfclk_mux                      ti,mux-clock               V   W                     H      uart3_gfclk_mux                      ti,mux-clock               V   W                     P      uart4_gfclk_mux                      ti,mux-clock               V   W                     X      uart5_gfclk_mux                      ti,mux-clock               V   W                     p      uart7_gfclk_mux                      ti,mux-clock               V   W                           uart8_gfclk_mux                      ti,mux-clock               V   W                           uart9_gfclk_mux                      ti,mux-clock               V   W                           vip1_gclk_mux                        ti,mux-clock               	   ~                            vip2_gclk_mux                        ti,mux-clock               	   ~                     (      vip3_gclk_mux                        ti,mux-clock               	   ~                     0         clockdomains       coreaon_clkdm            ti,clockdomain             d               l4@4ae00000          ti,dra7-l4-wkup simple-bus                                   =    J       counter@4000             ti,omap-counter32k            @    @        3counter_32k       prm@6000             ti,dra7-prm           `   0         "             clocks                               sys_clkin1                       ti,mux-clock                                                    }        S           Y         abe_dpll_sys_clk_mux                         ti,mux-clock                  D                  S           Y         abe_dpll_bypass_clk_mux                      ti,mux-clock                  P                  S           Y         abe_dpll_clk_mux                         ti,mux-clock                  P                  S           Y         abe_24m_fclk                         ti,divider-clock                                               S   =        Y   =      aess_fclk                        ti,divider-clock                         x        `           S           Y         abe_giclk_div                        ti,divider-clock                         t        `           S   Q        Y   Q      abe_lp_clk_div                       ti,divider-clock                                                S           Y         abe_sys_clk_div                      ti,divider-clock                                  `           S   >        Y   >      adc_gfclk_mux                        ti,mux-clock                  D   P                sys_clk1_dclk_div                        ti,divider-clock                       `   @                           S           Y         sys_clk2_dclk_div                        ti,divider-clock               D        `   @                           S           Y         per_abe_x1_dclk_div                      ti,divider-clock               o        `   @                           S           Y         dsp_gclk_div                         ti,divider-clock                        `   @                           S           Y         gpu_dclk                         ti,divider-clock               '        `   @                           S           Y         emif_phy_dclk_div                        ti,divider-clock                       `   @                           S           Y         gmac_250m_dclk_div                       ti,divider-clock                       `   @                           S           Y         gmac_main_clk                        fixed-factor-clock                     K           V           S  (        Y  (      l3init_480m_dclk_div                         ti,divider-clock               g        `   @                           S           Y         usb_otg_dclk_div                         ti,divider-clock                       `   @                           S           Y         sata_dclk_div                        ti,divider-clock                       `   @                           S           Y         pcie2_dclk_div                       ti,divider-clock                       `   @                           S           Y         pcie_dclk_div                        ti,divider-clock                       `   @                           S           Y         emu_dclk_div                         ti,divider-clock                       `   @                           S           Y         secure_32k_dclk_div                      ti,divider-clock                       `   @                           S           Y         clkoutmux0_clk_mux                       ti,mux-clock          X                                                                              X        S   U        Y   U      clkoutmux1_clk_mux                       ti,mux-clock          X                                                                              \      clkoutmux2_clk_mux                       ti,mux-clock          X                                                                              `        S   h        Y   h      custefuse_sys_gfclk_div                      fixed-factor-clock                     K           V         eve_clk                      ti,mux-clock               3   6                hdmi_dpll_clk_mux                        ti,mux-clock                  D          d        S   k        Y   k      mlb_clk                      ti,divider-clock                       `   @          4                 S   I        Y   I      mlbp_clk                         ti,divider-clock                       `   @          0                 S   J        Y   J      per_abe_x1_gfclk2_div                        ti,divider-clock               o        `   @          8                 S   K        Y   K      timer_sys_clk_div                        ti,divider-clock                         D        `           S   O        Y   O      video1_dpll_clk_mux                      ti,mux-clock                  D          h        S   l        Y   l      video2_dpll_clk_mux                      ti,mux-clock                  D          l        S   m        Y   m      wkupaon_iclk_mux                         ti,mux-clock                                    S   v        Y   v      gpio1_dbclk                      ti,gate-clock              P                     8      dcan1_sys_clk_mux                        ti,mux-clock                  D                             S  +        Y  +      timer1_gfclk_mux                         ti,mux-clock          ,     O   P   D   E   F   G   H   Q   R   S   T                     @      uart10_gfclk_mux                         ti,mux-clock               V   W                              clockdomains             scm_conf@c000            syscon                        S           Y            axi@0            simple-bus                                   =Q   Q     0               pcie_rc@51000000             ti,dra7-pcie            Q       Q     L               rc_dbics ti_conf config         "                                                     pci       0  =             0                0  0              B           &           0            3pcie1           A         
  Fpcie-phy0           P                     `  c                                                                                            qokay       interrupt-controller             -                      B           S           Y            pcie_ep@51000000             ti,dra7-pcie-ep          Q      (Q     LQ     (            &  ep_dbics ti_conf ep_dbics2 addr_space           "                  &           x                      3pcie1           A         
  Fpcie-phy0                          	  qdisabled             axi@1            simple-bus                                   =Q  Q    0     0            	  qdisabled       pcie@51800000            ti,dra7-pcie            Q      Q    L               rc_dbics ti_conf config         "      c         d                                    pci       0  =             0               00  0              B           &           0           3pcie2           A         
  Fpcie-phy0           P                     `  c                                                                                       interrupt-controller             -                      B           S           Y               ocmcram@40300000          
   mmio-sram           @0             =    @0                                 sram-hs@0            ti,secure-ram                            ocmcram@40400000          	  qdisabled          
   mmio-sram           @@             =    @@                                    ocmcram@40500000          	  qdisabled          
   mmio-sram           @P             =    @P                                    bandgap@4a0021e0          0  J !   J #,   J #   ,J #   <J %d   J %t   P         ti,dra752-bandgap           "       y                      S  C        Y  C      dsp_system@40d00000          syscon          @             S           Y         padconf@4844a000             ti,dra7-iodelay         HD                                mmc1_iodelay_ddr50_rev11_conf             <  $X    0 x  < <   H <   T           (      ,   7  4      8      @      D      L      P      X      \            S           Y         mmc1_iodelay_ddr50_rev20_conf                        $     (      ,      0  R  4      8     <    @      D      H    L      P      T    X      \            S           Y         mmc1_iodelay_sdr104_rev11_conf        X      '  (      ,     4      8      @      D     L      P      X      \            S           Y         mmc1_iodelay_sdr104_rev20_conf        X     X  (      ,      4      8     @      D      L      P      X      \            S           Y         mmc2_iodelay_hs200_1_8v_rev11_conf            Xm    ,  X       X,       X     <  <  X        X     x  X       X5      <  dX  h           S           Y         mmc2_iodelay_hs200_1_8v_rev20_conf                            I         s    y     /      m                                     .  d    h   L        S           Y         mmc2_iodelay_ddr_1_8v_rev11_conf                        <     <    h   x          <     < y  `                                                     o                       "           x               d      h           S           Y         mmc2_iodelay_ddr_1_8v_rev20_conf                                          Q               {  `  Z           7                                                               o           6         d      h            S           Y         mmc4_iodelay_ds_rev11_conf            @      H      L   `  P      T      p  F  t      x      |                  1                L                    S           Y         mmc4_iodelay_ds_rev20_conf            @      H      L  3  P      T      p    t      x      |  e                                C                    S           Y         mmc4_iodelay_sdr12_hs_sdr25_rev11_conf            @      H  
[  L  $  P      T      p  y  t      x      |                  c                                    S           Y         mmc4_iodelay_sdr12_hs_sdr25_rev20_conf            @      H  {  L  *  P      T      p  u  t      x      | @                              ,|                    S           Y            dma-controller@4a056000          ti,omap4430-sdma            J`          0  "                           	          
                                             S           Y         edma@43300000            ti,edma3-tpcc           3tpcc            C0           	  edma3_cc          $  "      i         h         g         '  edma3_ccint emda3_mperr edma3_ccerrint             @                                        S           Y         tptc@43400000            ti,edma3-tptc           3tptc0           C@             "      r           edma3_tcerrint          S           Y         tptc@43500000            ti,edma3-tptc           3tptc1           CP             "      s           edma3_tcerrint          S           Y         gpio@4ae10000            ti,omap4-gpio           J             "                  3gpio1                                -        B           S           Y         gpio@48055000            ti,omap4-gpio           HP            "                  3gpio2                                -        B         gpio@48057000            ti,omap4-gpio           Hp            "                  3gpio3                                -        B         gpio@48059000            ti,omap4-gpio           H            "                  3gpio4                                -        B         gpio@4805b000            ti,omap4-gpio           H            "                  3gpio5                                -        B           S           Y         gpio@4805d000            ti,omap4-gpio           H            "                  3gpio6                                -        B           S           Y      p20                  
                     
  radio_rst            gpio@48051000            ti,omap4-gpio           H            "                  3gpio7                                -        B            %         9        S  H        Y  H      gpio@48053000            ti,omap4-gpio           H0            "       t           3gpio8                                -        B         serial@4806a000          ti,dra742-uart ti,omap4-uart            H            D          C                3uart1           ;l         qokay            L      1          2            Qtx rx         serial@4806c000          ti,dra742-uart ti,omap4-uart            H            "       D           3uart2           ;l         qokay            L      3          4            Qtx rx         serial@48020000          ti,dra742-uart ti,omap4-uart            H             "       E           3uart3           ;l         qokay            L      5          6            Qtx rx         serial@4806e000          ti,dra742-uart ti,omap4-uart            H            "       A           3uart4           ;l       	  qdisabled            L      7          8            Qtx rx         serial@48066000          ti,dra742-uart ti,omap4-uart            H`            "       d           3uart5           ;l       	  qdisabled            L      ?          @            Qtx rx         serial@48068000          ti,dra742-uart ti,omap4-uart            H            "       e           3uart6           ;l       	  qdisabled            L      O          P            Qtx rx         serial@48420000          ti,dra742-uart ti,omap4-uart            HB             "                  3uart7           ;l       	  qdisabled          serial@48422000          ti,dra742-uart ti,omap4-uart            HB             "                  3uart8           ;l       	  qdisabled          serial@48424000          ti,dra742-uart ti,omap4-uart            HB@            "                  3uart9           ;l       	  qdisabled          serial@4ae2b000          ti,dra742-uart ti,omap4-uart            J            "                  3uart10          ;l       	  qdisabled          mailbox@4a0f4000             ti,omap4-mailbox            J@          $  "                                    	  3mailbox1            [           g           y         	  qdisabled          mailbox@4883a000             ti,omap4-mailbox            H          0  "                                              	  3mailbox2            [           g           y         	  qdisabled          mailbox@4883c000             ti,omap4-mailbox            H          0  "                                              	  3mailbox3            [           g           y         	  qdisabled       mbox_pru1_0                                              	  qdisabled          mbox_pru1_1                                             	  qdisabled             mailbox@4883e000             ti,omap4-mailbox            H          0  "                                              	  3mailbox4            [           g           y         	  qdisabled       mbox_pru2_0                                              	  qdisabled          mbox_pru2_1                                             	  qdisabled             mailbox@48840000             ti,omap4-mailbox            H           0  "                                              	  3mailbox5            [           g           y           qokay            S           Y      mbox_ipu1_ipc3x                                           qokay            S           Y         mbox_dsp1_ipc3x                                           qokay            S           Y            mailbox@48842000             ti,omap4-mailbox            H           0  "                                              	  3mailbox6            [           g           y           qokay            S           Y      mbox_ipu2_ipc3x                                           qokay            S           Y         mbox_dsp2_ipc3x                                           qokay            S  A        Y  A         mailbox@48844000             ti,omap4-mailbox            H@          0  "                                          	  3mailbox7            [           g           y         	  qdisabled          mailbox@48846000             ti,omap4-mailbox            H`          0  "                                          	  3mailbox8            [           g           y         	  qdisabled          mailbox@4885e000             ti,omap4-mailbox            H          0  "      	         
                           	  3mailbox9            [           g           y         	  qdisabled          mailbox@48860000             ti,omap4-mailbox            H           0  "                                          
  3mailbox10           [           g           y         	  qdisabled          mailbox@48862000             ti,omap4-mailbox            H           0  "                                          
  3mailbox11           [           g           y         	  qdisabled          mailbox@48864000             ti,omap4-mailbox            H@          0  "                                          
  3mailbox12           [           g           y         	  qdisabled          mailbox@48802000             ti,omap4-mailbox            H           0  "      {         |         }         ~         
  3mailbox13           [           g           y         	  qdisabled          timer@4ae18000           ti,omap5430-timer           J            "                   3timer1                 timer@48032000           ti,omap5430-timer           H             "       !           3timer2        timer@48034000           ti,omap5430-timer           H@            "       "           3timer3          S           Y         timer@48036000           ti,omap5430-timer           H`            "       #           3timer4          S           Y         timer@48820000           ti,omap5430-timer           H             "       $           3timer5          S           Y         timer@48822000           ti,omap5430-timer           H             "       %           3timer6          S  B        Y  B      timer@48824000           ti,omap5430-timer           H@            "       &           3timer7          S           Y         timer@48826000           ti,omap5430-timer           H`            "       '           3timer8          S           Y         timer@4803e000           ti,omap5430-timer           H            "       (           3timer9          S           Y         timer@48086000           ti,omap5430-timer           H`            "       )           3timer10         S           Y         timer@48088000           ti,omap5430-timer           H            "       *           3timer11         S           Y         timer@4ae20000           ti,omap5430-timer           J             "       Z           3timer12                         timer@48828000           ti,omap5430-timer           H            "      S           3timer13       timer@4882a000           ti,omap5430-timer           H            "      T           3timer14       timer@4882c000           ti,omap5430-timer           H            "      U           3timer15       timer@4882e000           ti,omap5430-timer           H            "      V           3timer16       wdt@4ae14000             ti,omap3-wdt            J@            "       K         
  3wd_timer2         spinlock@4a0f6000            ti,omap4-hwspinlock         J`          	  3spinlock                       S  X        Y  X      dmm@4e000000             ti,omap5-dmm            N              "       l           3dmm       ipu@58820000             ti,dra7-ipu         X             l2ram           3ipu1                       J U         qokay                                                             ipu@55020000             ti,dra7-ipu         U             l2ram           3ipu2                       J          qokay                                                             dsp@40800000             ti,dra7-dsp         @    @     @             l2ram l1pram l1dram         3dsp1                 \                      J T         qokay                                                          gpu@56000000             ti,dra7-sgx544 img,sgx544           V              gpu_ocp_base            "                  3gpu            	   t   u        iclk fclk1 fclk2          bb2d@59000000            ti,dra7-bb2d            Y              "       x           3bb2d                       fclk            qokay          i2c@48070000             ti,omap4-i2c            H             "       3                                     3i2c1            qokay            ;    tps659038@58             ti,tps659038               X   tps659038_pmic           ti,tps659038-pmic      regulators     smps123         _smps123         n P                  &         :        S           Y         smps45          _smps45          n P                  &         :        S           Y         smps6           _smps6           n P                  &         :        S           Y         smps7           _smps7           n P         0         &         :        S           Y         smps8           _smps8           n P                  &         :        S           Y         smps9           _smps9           n w@         w@         &         :      ldo1            _ldo1            n w@         2Z         &         :        S           Y         ldo2            _ldo2            n 2Z         2Z         &         :      ldo3            _ldo3            n w@         w@         &         :        S  4        Y  4      ldo9            _ldo9            n                   &         :         L      ldoln           _ldoln           n w@         w@         &         :        S  1        Y  1      ldousb          _ldousb          n 2Z         2Z         :        S          Y        regen2          _regen2           :         &      sysen1          _sysen1           :         &        S  F        Y  F      sysen2          _sysen2           :         &        S  G        Y  G               gpio@20          nxp,pcf8575                                          &           "               -        B           S  L        Y  L      gpio@21          ti,pcf8575             !        c                               &           "               -        B           S           Y         tlv320aic3106@19            x             ti,tlv320aic3106                          (                   qokay                                                        S  K        Y  K      tc358768@0e          toshiba,tc358768                                  refclk                       ports                                port@0                 endpoint                                  S  7        Y  7         port@1                endpoint                     (  *                               	        S  [        Y  [               tlc59116@40                                    ti,tlc59108            @   bl@2          
   backlight                      S  Y        Y  Y         gpio@27          nxp,pcf8575            '                            S           Y         edt-ft5506@38           qokay             edt,edt-ft5506 edt,edt-ft5x06              8                                               &           "               i2c@48072000             ti,omap4-i2c            H             "       4                                     3i2c2            qokay            ;         S  Q        Y  Q   gpio@26          nxp,pcf8575            &                            S           Y      p1                   
                        vin6_sel_s0          ov10633@37           ovti,ov10633               7        ,            port       endpoint                       6           C           P            S  8        Y  8            serializer@1b            ti,ds90uh925q                                                =   ,   ,         deserializer@2c          ti,ds90uh928q              ,         \      tlc59108@1c       	  qdisabled                        ti,tlc59108-fpddisp         g             port@lcd3      endpoint                       S  6        Y  6               tlv320aic3106@18            x             ti,tlv320aic3106                          (                   tJ3A         qokay                                                        S  W        Y  W      tlv320aic3106@19            x             ti,tlv320aic3106                          (                   tJ3B         qokay                                                      tlv320aic3106@1a            x             ti,tlv320aic3106                          (                   tJ3C         qokay                                                      tvp5158@58           ti,tvp5158             X        ,                      port       endpoint@0          P                                 S  9        Y  9               i2c@48060000             ti,omap4-i2c            H             "       8                                     3i2c3            qokay            ;       i2c@4807a000             ti,omap4-i2c            H            "       9                                     3i2c4            qokay            ;    pcf8575@21           nxp,pcf8575            !                            S           Y            i2c@4807c000             ti,omap4-i2c            H            "       7                                     3i2c5          	  qdisabled          mmc@4809c000             ti,dra7-hsmmc ti,omap4-hsmmc            H	            "       N           3mmc1                              L      =      >        Qtx rx           qokay                                                                                                                      "q       C  0default hs sdr12 sdr25 sdr50 ddr50-rev11 sdr104-rev11 ddr50 sdr104          >           H           R           \           f           p              z                                        mmc@480b4000             ti,dra7-hsmmc ti,omap4-hsmmc            H@            "       Q           3mmc2                     L      /      0        Qtx rx           qokay                                                                      "q       ?  0default hs ddr_1_8v-rev11 ddr_1_8v hs200_1_8v-rev11 hs200_1_8v          >           H           R              \              f              p            mmc@480ad000             ti,dra7-hsmmc ti,omap4-hsmmc            H
            "       Y           3mmc3                     L      M      N        Qtx rx         	  qdisabled                                     mmc@480d1000             ti,dra7-hsmmc ti,omap4-hsmmc            H            "       [           3mmc4                     L      9      :        Qtx rx           qokay                                                                             F  0default-rev11 default hs-rev11 hs sdr12-rev11 sdr12 sdr25-rev11 sdr25           >              H              R              \              f              p              z                                                 wlcore@0          
   ti,wl1835                       &           "               mmu@40d01000             ti,dra7-dsp-iommu           @            "                
  3mmu0_dsp1                                      qokay            S           Y         mmu@40d02000             ti,dra7-dsp-iommu           @             "                
  3mmu1_dsp1                                     qokay            S           Y         mmu@58882000             ti,dra7-iommu           X             "               	  3mmu_ipu1                         	        qokay            S           Y         mmu@55082000             ti,dra7-iommu           U             "               	  3mmu_ipu2                         	        qokay            S           Y         pruss@4b200000           ti,am5728-pruss         3pruss1        0  K       K       K!     K"`     K"   K#     X      $  dram0 dram1 shrdram2 cfg iep mii_rt                                   =      	  qdisabled       intc@4b220000            ti,am5728-pruss-intc            K"              intc          `  "                                                                                      0  host2 host3 host4 host5 host6 host7 host8 host9          -        B         pru0@4b234000            ti,am5728-pru           K#@   0 K"     K"$            iram control debug        	  qdisabled          pru1@4b238000            ti,am5728-pru           K#   0 K"@    K"D            iram control debug        	  qdisabled          mdio@4b232400            ti,davinci_mdio                                              fck         	% B@        K#$          	  qdisabled             pruss@4b280000           ti,am5728-pruss         3pruss2        0  K(      K(      K)     K*`     K*   K+     X      $  dram0 dram1 shrdram2 cfg iep mii_rt                                   =      	  qdisabled       intc@4b2a0000            ti,am5728-pruss-intc            K*              intc          `  "                                                                                      0  host2 host3 host4 host5 host6 host7 host8 host9          -        B         pru0@4b2b4000            ti,am5728-pru           K+@   0 K*     K*$            iram control debug        	  qdisabled          pru1@4b2b8000            ti,am5728-pru           K+   0 K*@    K*D            iram control debug        	  qdisabled          mdio@4b2b2400            ti,davinci_mdio                                              fck         	% B@        K+$          	  qdisabled             regulator-abb-mpu         
   ti,abb-v3           _abb_mpu                                               	.   2        	?         (  J}   J}   J`   J ;    JX         D  setup-address control-address int-address efuse-address ldo-address         	O           	h           	         H  	 ,                  @                 v                        S           Y         regulator-abb-ivahd       
   ti,abb-v3         
  _abb_ivahd                                                 	.   2        	?         (  J~4   J~$   J`   J %   J $p         D  setup-address control-address int-address efuse-address ldo-address         	O@           	h           	         H  	                   0                                         S           Y         regulator-abb-dspeve          
   ti,abb-v3           _abb_dspeve                                                	.   2        	?         (  J~0   J~    J`   J %   J $l         D  setup-address control-address int-address efuse-address ldo-address         	O            	h           	         H  	                   0                                         S           Y         regulator-abb-gpu         
   ti,abb-v3           _abb_gpu                                               	.   2        	?         (  J}   J}   J`   J ;   JT         D  setup-address control-address int-address efuse-address ldo-address         	O           	h           	         H  	                   v                                          S           Y         oppdm@4a003b20           ti,omap5-oppdm          	            	           J ;            	 ,     @    v           	 `        	           S           Y         oppdm@4a0025cc           ti,omap5-oppdm          	            	           J %           	      0               	 `        	         oppdm@4a0025e0           ti,omap5-oppdm          	            	           J %           	      0               	 `        	         oppdm@4a003b08           ti,omap5-oppdm          	            	           J ;           	      v                	 `        	         oppdm@4a0025f4           ti,omap5-core-oppdm         	            J %           	             	 `        	         spi@48098000             ti,omap4-mcspi          H	            "       <                                     3mcspi1          	         @  L      #      $      %      &      '      (      )      *         Qtx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3         qokay          spi@4809a000             ti,omap4-mcspi          H	            "       =                                     3mcspi2          	            L      +      ,      -      .        Qtx0 rx0 tx1 rx1         qokay          spi@480b8000             ti,omap4-mcspi          H            "       V                                     3mcspi3          	           L                    Qtx0 rx0       	  qdisabled          spi@480ba000             ti,omap4-mcspi          H            "       +                                     3mcspi4          	           L      F      G        Qtx0 rx0       	  qdisabled          qspi@4b300000            ti,dra7xxx-qspi         K0     \              qspi_base qspi_mmap         	     X                                  3qspi                       fck         	           "      W           qokay            
    m25p80@0             s25fl256s1          
                     
#           
4                               partition@0       	   QSPI.SPL                         partition@1          QSPI.u-boot                     partition@2          QSPI.u-boot-spl-os                      partition@3          QSPI.u-boot-env                     partition@4          QSPI.u-boot-env.backup1                     partition@5          QSPI.kernel                     partition@6          QSPI.file-system               b              ocp2scp@4a090000             ti,omap-ocp2scp                                   =        J	            	  3ocp2scp3       phy@4A096000             ti,phy-pipe3-sata           J	`    J	d    dJ	h    @        phy_rx phy_tx pll_ctrl          
E     t                      sysclk refclk           
V             
f            S          Y        pciephy@4a094000             ti,phy-pipe3-pcie           J	@    J	D    d        phy_rx phy_tx           
E             
q                X   Y         ]         ;  dpll_ref dpll_ref_m2 wkupclk refclk div-clk phy-div sysclk          
f            S           Y         pciephy@4a095000             ti,phy-pipe3-pcie           J	P    J	T    d        phy_rx phy_tx           
E              
q                X   Y         ]         ;  dpll_ref dpll_ref_m2 wkupclk refclk div-clk phy-div sysclk          
f          	  qdisabled            S           Y            sata@4a141100            snps,dwc-ahci           J     J            "       1           A        	  Fsata-phy                       3sata          rtc@48838000             ti,am3352-rtc           H            "                            3rtcss              P      ocp2scp@4a080000             ti,omap-ocp2scp                                   =        J            	  3ocp2scp1       phy@4a084000             ti,dra7x-usb2 ti,omap-usb2          J@            
E                	  
        wkupclk refclk          
f            
|          S          Y        phy@4a085000              ti,dra7x-usb2-phy2 ti,omap-usb2         JP            
E     t                    wkupclk refclk          
f            
|          S          Y        phy@4a084400             ti,omap-usb3            JD    JH    dJL    @        phy_rx phy_tx pll_ctrl          
E     p               
        wkupclk sysclk refclk           
f            S          Y           omap_dwc3_1@48880000             ti,dwc3         3usb_otg_ss1         H             "       H                                    
            =        
     usb@48890000          
   snps,dwc3           H   p       $  "       G          G          H           peripheral host otg         A            Fusb2-phy usb3-phy            
        
super-speed         
otg          
         
         omap_dwc3_2@488c0000             ti,dwc3         3usb_otg_ss2         H             "       W                                    
            =        
     usb@488d0000          
   snps,dwc3           H   p       $  "       I          I          W           peripheral host otg         A        	  Fusb2-phy             
        
high-speed          
host             
         
         omap_dwc3_3@48900000             ti,dwc3         3usb_otg_ss3         H             "      X                                    
            =      	  qdisabled       usb@48910000          
   snps,dwc3           H   p       $  "       X          X         X           peripheral host otg          
        
high-speed          
otg          
         
         elm@48078000             ti,am3352-elm           H           "                  3elm         qokay            S          Y        gpmc@50000000            ti,am3352-gpmc          3gpmc            P     |        "                  L                  Qrxtx            
           
                                     -        B                               qokay            =                      S          Y     nand@0,0             ti,omap2-nand                               &          "                                         bch8            &          0           ?           Q            b            p   P           P                       <           <           
           2                      (           (           P        $   P        5   P        F            ]            w                                            partition@0       	   NAND.SPL                         partition@1          NAND.SPL.backup1                        partition@2          NAND.SPL.backup2                        partition@3          NAND.SPL.backup3                        partition@4          NAND.u-boot-spl-os                      partition@5          NAND.u-boot                     partition@6          NAND.u-boot-env                     partition@7          NAND.u-boot-env.backup1                     partition@8          NAND.kernel                      partition@9          NAND.file-system               `              atl@4843c000             ti,dra7-atl         HC           3atl            C   B   A   @                   fck         qokay                           B   A           D   o                
@   D  D    atl2                                atl1                                   mcasp@48460000           ti,dra7-mcasp-audio         3mcasp1          HF      E             mpu dat         "       h          g           tx rx           L                          Qtx rx                         fck ahclkx ahclkr         	  qdisabled          mcasp@48464000           ti,dra7-mcasp-audio         3mcasp2          HF@     E             mpu dat         "                            tx rx           L                          Qtx rx                         fck ahclkx ahclkr           qokay                         A                                                                              mcasp@48468000           ti,dra7-mcasp-audio         3mcasp3          HF     F              mpu dat         "                            tx rx           L                          Qtx rx                       fck ahclkx          qokay            x                         A                                                                             S  J        Y  J      mcasp@4846c000           ti,dra7-mcasp-audio         3mcasp4          HF     HC`            mpu dat         "                            tx rx           L                          Qtx rx                       fck ahclkx        	  qdisabled          mcasp@48470000           ti,dra7-mcasp-audio         3mcasp5          HG      HC            mpu dat         "                            tx rx           L                          Qtx rx                !        fck ahclkx        	  qdisabled          mcasp@48474000           ti,dra7-mcasp-audio         3mcasp6          HG@     HD            mpu dat         "                            tx rx           L                          Qtx rx             "  #        fck ahclkx          qokay            x              #           B                                                                                      S  V        Y  V      mcasp@48478000           ti,dra7-mcasp-audio         3mcasp7          HG     HE             mpu dat         "                            tx rx           L                          Qtx rx             $  %        fck ahclkx        	  qdisabled          mcasp@4847c000           ti,dra7-mcasp-audio         3mcasp8          HG     HE@            mpu dat         "                            tx rx           L                          Qtx rx             &  '        fck ahclkx          qokay            S  R        Y  R      crossbar@4a002a48            ti,irq-crossbar         J *H  0         -         &           B                                #            /                                 @   
                 M            S           Y         ethernet@48484000            ti,dra7-cpsw ti,cpsw            3gmac              (  )      	  fck cpts            ^           m           y                                               xL                   HH@    HHR   .                                         0  "      N         O         P         Q            =        X           qokay                mdio@48485000            ti,cpsw-mdio                                      3davinci_mdio            	% B@        HHP            S  *        Y  *      slave@48480200                            *           rgmii                    slave@48480300                            *           rgmii                    cpsw-phy-sel@4a002554            ti,dra7xx-cpsw-phy-sel          J %T         	  gmii-sel             can@481cc000             ti,dra7-d_can           3dcan1           J             
     X            "                    +        qok          0default sleep active            >  ,        H  ,        R  -      can@481d0000             ti,dra7-d_can           3dcan2           HH              
     X           "                           	  qdisabled          dss@58000000             ti,dra7-dss         qokay          	  3dss_core                 8                                  =      (  X      X @T   X C     X T   X            (  dss pll1_clkctrl pll1 pll2_clkctrl pll2           .  /  0        fck video1_clk video2_clk           )  1   dispc@58001000           ti,dra7-dispc           X             "                
  3dss_dispc             .        fck         ;     4      encoder@58060000             ti,dra7-hdmi             X     X    X    X            wp pll phy core         "       `           qok        	  3dss_hdmi              2  3        fck sys_clk         L      L      	  Qaudio_tx            F  4   port       endpoint              5        S  S        Y  S            ports                                   	  qdisabled       port@lcd3                 endpoint              6                   S           Y            port@0                 endpoint              7                   S           Y                  vpe          ti,vpe          3vpe            ~        fck       @  H     H     H     H     H    <H    HW    H          A  vpe_top vpe_chr_us0 vpe_chr_us1 vpe_chr_us2 vpe_dei sc csc vpdma            "      b                                   vip@0x48970000           ti,vip1       @  H    HU    HW    HX    HZ    H\    H]    H          ,  vip parser0 csc0 sc0 parser1 csc1 sc1 vpdma         3vip1            "      _                    ;     4                                  qokay       port@0                                                qokay            S           Y      endpoint@0           \          8      endpoint             \          9         port@1                                             	  qdisabled          port@2                                             	  qdisabled          port@3                                             	  qdisabled             epwmss@4843e000           ti,dra746-pwmss ti,am33xx-pwmss         HC    0        3epwmss0                                	  qdisabled             =   pwm@4843e200          3   ti,dra746-ehrpwm ti,am3352-ehrpwm ti,am33xx-ehrpwm          R           HC              :         
  tbclk fck         	  qdisabled          ecap@4843e100         -   ti,dra746-ecap ti,am3352-ecap ti,am33xx-ecap            R           HC                       fck       	  qdisabled             epwmss@48440000           ti,dra746-pwmss ti,am33xx-pwmss         HD     0        3epwmss1                                	  qdisabled             =   pwm@48440200          3   ti,dra746-ehrpwm ti,am3352-ehrpwm ti,am33xx-ehrpwm          R           HD              ;         
  tbclk fck         	  qdisabled          ecap@48440100         -   ti,dra746-ecap ti,am3352-ecap ti,am33xx-ecap            R           HD                       fck       	  qdisabled             epwmss@48442000           ti,dra746-pwmss ti,am33xx-pwmss         HD     0        3epwmss2                                	  qdisabled             =   pwm@48442200          3   ti,dra746-ehrpwm ti,am3352-ehrpwm ti,am33xx-ehrpwm          R           HD"              <         
  tbclk fck         	  qdisabled          ecap@48442100         -   ti,dra746-ecap ti,am3352-ecap ti,am33xx-ecap            R           HD!                       fck       	  qdisabled             aes@4b500000             ti,omap4-aes            3aes1            KP             "       P           L      o          n            Qtx rx              	        fck       aes@4b700000             ti,omap4-aes            3aes2            Kp             "       ;           L      r          q            Qtx rx              	        fck       des@480a5000             ti,omap4-des            3des         H
P            "       M           L      u      t        Qtx rx              	        fck       sham@53100000            ti,omap5-sham           3sham            K            "       .           L      w            Qrx             	        fck       rng@48090000             ti,omap4-rng            3rng         H	              "       /              	        fck       dsp_system@41500000          syscon          AP             S  =        Y  =      omap_dwc3_4@48940000             ti,dwc3         3usb_otg_ss4         H             "      Z                                    
            =      	  qdisabled       usb@48950000          
   snps,dwc3           H   p       $  "      Y         Y         Z           peripheral host otg          
        
high-speed          
otg          mmu@41501000             ti,dra7-dsp-iommu           AP            "                
  3mmu0_dsp2                         =            qokay            S  >        Y  >      mmu@41502000             ti,dra7-dsp-iommu           AP             "                
  3mmu1_dsp2                         =           qokay            S  ?        Y  ?      dsp@41000000             ti,dra7-dsp         A     A`     Ap             l2ram l1pram l1dram         3dsp2                 `          >  ?        J V         qokay              @             A           B      vip@0x48990000           ti,vip2       @  H    HU    HW    HX    HZ    H\    H]    H          ,  vip parser0 csc0 sc0 parser1 csc1 sc1 vpdma         3vip2            "      `                    ;     4                                	  qdisabled       port@0                                              	  qdisabled          port@1                                             	  qdisabled          port@2                                             	  qdisabled          port@3                                             	  qdisabled             vip@0x489b0000           ti,vip3       @  H    HU    HW    HX    HZ    H\    H]    H          ,  vip parser0 csc0 sc0 parser1 csc1 sc1 vpdma         3vip3            "      a                    ;     4                                	  qdisabled       port@0                                              	  qdisabled          port@1                                             	  qdisabled                thermal-zones      cpu_thermal         ]           s            C       trips      cpu_alert                              passive         S  D        Y  D      cpu_crit             H                	  critical             cooling-maps       map0              D          E            gpu_thermal         ]           s            C      trips      gpu_crit             H                	  critical                core_thermal            ]           s            C      trips      core_crit            H                	  critical                dspeve_thermal          ]           s            C      trips      dspeve_crit          H                	  critical                iva_thermal         ]           s            C      trips      iva_crit             H                	  critical                   pmu          arm,cortex-a15-pmu           &           "                          reserved-memory                                   =   ipu2_cma@95800000            shared-dma-pool                                      qokay            S           Y         dsp1_cma@99000000            shared-dma-pool                                        qokay            S           Y         ipu1_cma@9d000000            shared-dma-pool                                        qokay            S           Y         dsp2_cma@9f000000            shared-dma-pool                                        qokay            S  @        Y  @      cmem@95400000               @       @                   qokay          dsp1_sr0@bfb00000                                         qokay             fixedregulator-sd            regulator-fixed         _evm_3v3_sd          n 2Z         2Z                                   S           Y         fixedregulator-evm_3v3_sw            regulator-fixed         _evm_3v3_sw            F        n 2Z         2Z        S           Y         fixedregulator-aic_dvdd          regulator-fixed       	  _aic_dvdd                       n w@         w@        S           Y         fixedregulator-mmcwl             regulator-fixed         _vmmcwl_fixed            n w@         w@                           p                 S           Y         extcon_usb1          linux,extcon-usb-gpio                              S          Y        extcon_usb2          linux,extcon-usb-gpio                              S          Y        fixedregulator-vtt           regulator-fixed       
  _vtt_fixed           n p         p         &         :                   G          H             sound@0          simple-audio-card           DRA7xx-EVM        H  Headphone Headphone Jack Line Line Out Microphone Mic Jack Line Line In         9Headphone Jack HPLOUT Headphone Jack HPROUT Line Out LLOUT Line Out RLOUT MIC3L Mic Jack MIC3R Mic Jack Mic Jack Mic Bias LINE1L Line In LINE1R Line In         Sdsp_b           l  I          I            simple-audio-card,cpu             J         D         S  I        Y  I      simple-audio-card,codec           K           A         leds          
   gpio-leds      led@0         
   dra7:usr1           
  L              off       led@1         
   dra7:usr2           
  L              off       led@2         
   dra7:usr3           
  L              off       led@3         
   dra7:usr4           
  L              off          gpio_keys         
   gpio-keys                                         USER1         	   btnUser1                       
  L            USER2         	   btnUser2                      
  L               connector@1          hdmi-connector           hdmi            a      port       endpoint              M        S  T        Y  T            encoder@1            ti,dra7evm-tpd12s015            0i2c ddc         >  N  O        H  N  P          Q        #  R      $  
                      H          ports                                port@0                 endpoint@0            S        S  5        Y  5         port@1                endpoint@0            T        S  M        Y  M               jamr3_sound          simple-audio-card           DRA7xx-JAMR3            Line Line Out Line Line In        <  9Line Out LLOUT Line Out RLOUT LINE1L Line In LINE1R Line In         Sdsp_b           l  U          U            simple-audio-card,cpu             V         D         S  U        Y  U      simple-audio-card,codec           W           B         gatemp           hwspinlock-user       P  .  X      X     X     X     X     X     X     X     X     X   	      sr0          generic-uio                            backlight            led-backlight           6  Y      $  ;                                    M           g  L              S  Z        Y  Z      display          osd,osd101t2045-53ts panel-dpi           lcd         f  Z   panel-timing            ;	-ڀ        p          x             p                                                                6            C                                port       endpoint              [        S           Y               tc358768_refclk                      fixed-clock         ;1-         S           Y            	#address-cells #size-cells compatible interrupt-parent model i2c0 i2c1 i2c2 i2c3 i2c4 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 ethernet0 ethernet1 d_can0 d_can1 rproc0 rproc1 rproc2 rproc3 display0 display1 sound0 sound1 i2c7 display2 device_type reg interrupts interrupt-controller #interrupt-cells linux,phandle operating-points-v2 cpu-opp-domain ti,syscon-efuse ti,syscon-rev clocks clock-names clock-latency cooling-min-level cooling-max-level #cooling-cells opp-shared opp-hz opp-microvolt opp-supported-hw opp-suspend ti,hwmods ranges interrupts-extended syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells ti,bit-shift pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins #dma-cells dma-requests ti,dma-safe-map dma-masters clock-frequency clock-mult clock-div ti,max-div ti,autoidle-shift ti,index-starts-at-one ti,invert-autoidle-bit ti,index-power-of-two assigned-clocks assigned-clock-rates assigned-clock-parents ti,dividers ti,set-rate-parent reg-names num-lanes linux,pci-domain phys phy-names interrupt-map-mask interrupt-map status num-ib-windows num-ob-windows syscon-legacy-mode #thermal-sensor-cells dma-channels interrupt-names ti,tptcs gpio-controller #gpio-cells gpio-hog gpios output-low line-name ti,no-reset-on-init ti,no-idle-on-init dmas dma-names #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,timer-alwon ti,timer-secure #hwlock-cells iommus ti,rproc-standby-info memory-region mboxes timers watchdog-timers syscon-bootreg regulator-always-on regulator-boot-on regulator-allow-bypass lines-initial-states #sound-dai-cells adc-settle-ms ai3x-micbias-vg AVDD-supply IOVDD-supply DRVDD-supply DVDD-supply reset-gpios remote-endpoint data-lines label touchscreen-size-x touchscreen-size-y mux-gpios hsync-active vsync-active pclk-sample slave-mode enable-gpios name-prefix ti,dual-volt ti,needs-special-reset pbias-supply sd-uhs-sdr104 sd-uhs-sdr50 sd-uhs-ddr50 sd-uhs-sdr25 sd-uhs-sdr12 vmmc-supply vmmc_aux-supply bus-width cd-gpios max-frequency pinctrl-names pinctrl-0 pinctrl-1 pinctrl-2 pinctrl-3 pinctrl-4 pinctrl-5 pinctrl-6 pinctrl-7 pinctrl-8 mmc-hs200-1_8v mmc-ddr-1_8v cap-power-off-card keep-power-in-suspend ti,non-removable #iommu-cells ti,syscon-mmuconfig ti,iommu-bus-err-back bus_freq ti,settling-time ti,clock-cycles ti,tranxdone-status-mask ti,ldovbb-override-mask ti,ldovbb-vset-mask ti,abb_info #oppdm-cells vbb-supply ti,efuse-settings ti,absolute-max-voltage-uv vdd-supply ti,spi-num-cs syscon-chipselects spi-max-frequency spi-tx-bus-width spi-rx-bus-width syscon-phy-power syscon-pllreset #phy-cells syscon-pcs phy-supply utmi-mode extcon tx-fifo-resize maximum-speed dr_mode snps,dis_u3_susphy_quirk snps,dis_u2_susphy_quirk gpmc,num-cs gpmc,num-waitpins rb-gpios ti,nand-ecc-opt ti,elm-id nand-bus-width gpmc,device-width gpmc,sync-clk-ps gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,access-ns gpmc,wr-access-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,clk-activation-ns gpmc,wr-data-mux-bus-ns ti,provided-clocks bws aws op-mode tdm-slots serial-dir shared-dai tx-num-evt rx-num-evt ti,max-irqs ti,max-crossbar-sources ti,reg-size ti,irqs-reserved ti,irqs-skip ti,irqs-safe-map cpdma_channels ale_entries bd_ram_size mac_control slaves active_slave cpts_clock_mult cpts_clock_shift ti,no-idle dual_emac mac-address phy_id phy-mode dual_emac_res_vlan syscon-raminit syscon-pll-ctrl vdda_video-supply syscon-pol vdda-supply #pwm-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device reusable no-map enable-active-high gpio vin-supply startup-delay-us id-gpio simple-audio-card,name simple-audio-card,widgets simple-audio-card,routing simple-audio-card,format simple-audio-card,bitclock-master simple-audio-card,frame-master simple-audio-card,bitclock-inversion sound-dai system-clock-frequency default-state autorepeat linux,code ddc-i2c-bus mcasp-gpio hwlocks leds brightness-levels default-brightness-level backlight hactive vactive hfront-porch hback-porch hsync-len vfront-porch vback-porch vsync-len de-active pixelclk-active 