From 99571fbaa1c9cae62453cca7a2980b58e89e6dd2 Mon Sep 17 00:00:00 2001
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Date: Mon, 27 Nov 2017 16:53:06 +0300
Subject: [PATCH 37/61] clk: r8a779x: add IMP clock

This adds IMP clock sources for Gen3 SoCs

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
---
 drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
 drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 02cddcb..a45822d 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -233,6 +233,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
 	DEF_MOD("imr2",			 821,	R8A7795_CLK_S0D2),
 	DEF_MOD("imr1",			 822,	R8A7795_CLK_S0D2),
 	DEF_MOD("imr0",			 823,	R8A7795_CLK_S0D2),
+	DEF_MOD("imp",			 824,	R8A7795_CLK_S1D1),
 	DEF_MOD("gpio7",		 905,	R8A7795_CLK_S3D4),
 	DEF_MOD("gpio6",		 906,	R8A7795_CLK_S3D4),
 	DEF_MOD("gpio5",		 907,	R8A7795_CLK_S3D4),
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index dfc4741..957e64f 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -205,6 +205,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
 	DEF_MOD("etheravb",		 812,	R8A7796_CLK_S0D6),
 	DEF_MOD("imr1",			 822,	R8A7796_CLK_S0D2),
 	DEF_MOD("imr0",			 823,	R8A7796_CLK_S0D2),
+	DEF_MOD("imp",			 824,	R8A7796_CLK_S1D1),
 	DEF_MOD("gpio7",		 905,	R8A7796_CLK_S3D4),
 	DEF_MOD("gpio6",		 906,	R8A7796_CLK_S3D4),
 	DEF_MOD("gpio5",		 907,	R8A7796_CLK_S3D4),
-- 
2.7.4

