From 853eb0ced4522f2d93f4b26abf656f358fd7a80e Mon Sep 17 00:00:00 2001
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Date: Tue, 28 Nov 2017 14:47:12 +0300
Subject: [PATCH 040/122] arm64: dts: renesas: r8a779x: add IMP nodes

This adds IMP resource nodes for Gen3 SoCs

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 98 ++++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a7796.dtsi | 62 ++++++++++++++++++++
 2 files changed, 160 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b9c4a39..536deef 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -3265,6 +3265,104 @@
 		};
 	};
 
+		imp_distributer: impdes0 {
+			compatible = "renesas,impx4-distributer";
+			reg = <0 0xffa00000 0 0x4000>;
+			interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+		};
+
+		imp0 {
+			compatible = "renesas,impx4-legacy";
+			reg = <0 0xff900000 0 0x20000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <0>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
+		imp1 {
+			compatible = "renesas,impx4-legacy";
+			reg = <0 0xff920000 0 0x20000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <1>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
+		imp2 {
+			compatible = "renesas,impx4-legacy";
+			reg = <0 0xff940000 0 0x20000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <2>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
+		imp3 {
+			compatible = "renesas,impx4-legacy";
+			reg = <0 0xff960000 0 0x20000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <3>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
+		impsc0 {
+			compatible = "renesas,impx4-shader";
+			reg = <0 0xff980000 0 0x10000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <4>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
+		impsc1 {
+			compatible = "renesas,impx4-shader";
+			reg = <0 0xff990000 0 0x10000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <5>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
+		impsl0 {
+			compatible = "renesas,impx4-legacy";
+			reg = <0 0xff9c0000 0 0x10000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <12>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
+		impdm0 {
+			compatible = "renesas,impx5-dmac";
+			reg = <0 0xffa10000 0 0x4000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <16>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
+		impc0 {
+			compatible = "renesas,impx4-memory";
+			reg = <0 0xffa40000 0 0x20000>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
+		imprtt {
+			compatible = "renesas,impx5-rtt";
+			reg = <0 0xff8d0000 0 0x1000>,
+				<0 0xe6150000 0 0x1000>;
+			interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7795_PD_A3IR>;
+		};
+
 	thermal-zones {
 		emergency {
 			polling-delay = <1000>;
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index c41d1c2..383639b 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -2638,6 +2638,68 @@
 			resets = <&cpg 822>;
 		};
 
+		imp_distributer: impdes0 {
+			compatible = "renesas,impx4-distributer";
+			reg = <0 0xffa00000 0 0x4000>;
+			interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7796_PD_A3IR>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+		};
+
+		imp0 {
+			compatible = "renesas,impx4-legacy";
+			reg = <0 0xff900000 0 0x20000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <0>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7796_PD_A3IR>;
+		};
+
+		imp1 {
+			compatible = "renesas,impx4-legacy";
+			reg = <0 0xff920000 0 0x20000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <1>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7796_PD_A3IR>;
+		};
+
+		impsc0 {
+			compatible = "renesas,impx4-shader";
+			reg = <0 0xff980000 0 0x10000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <4>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7796_PD_A3IR>;
+		};
+
+		impdm0 {
+			compatible = "renesas,impx5-dmac";
+			reg = <0 0xffa10000 0 0x4000>;
+			interrupt-parent = <&imp_distributer>;
+			interrupts = <16>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7796_PD_A3IR>;
+		};
+
+		impc0 {
+			compatible = "renesas,impx4-memory";
+			reg = <0 0xffa40000 0 0x20000>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7796_PD_A3IR>;
+		};
+
+		imprtt {
+			compatible = "renesas,impx5-rtt";
+			reg = <0 0xff8d0000 0 0x1000>,
+				<0 0xe6150000 0 0x1000>;
+			interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 824>;
+			power-domains = <&sysc R8A7796_PD_A3IR>;
+		};
+
 		fcpcs: vcp4@fe90f000 {
 			compatible = "renesas,vcp4-fcpcs";
 			reg = <0 0xfe90f000 0 0x200>;
-- 
2.7.4

