 `   8 N   (             N\                             K    sancloud,am335x-boneenhanced ti,am335x-bone-black ti,am335x-bone ti,am33xx                                   +         "   7SanCloud BeagleBone Enhanced Lite      chosen        F   =/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0         aliases       C   I/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0        ?   N/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0        D   S/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0       F   X/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0         B   `/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0         B   h/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0         G   p/ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0        G   x/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0        G   /ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0        D   /ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0       D   /ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0       %   /ocp/target-module@47400000/usb@1400          %   /ocp/target-module@47400000/usb@1800          )   /ocp/target-module@47400000/usb-phy@1300          )   /ocp/target-module@47400000/usb-phy@1b00          O   /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@200        O   /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@300        ?   /ocp/interconnect@48000000/segment@0/target-module@30000/spi@0        D   /ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0       ?   /ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0        D   /ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0       "   /ocp/target-module@47810000/mmc@0         cpus                         +       cpu@0             arm,cortex-a8         
   ti,am3352            cpu                                  	           cpu                  *           :         idle-states    mpu_gate              arm,idle-state          F   (        W   Z        g  ,         x                       opp-table             operating-points-v2-ti-cpu                           opp50-300000000                       ~ 4 (                             opp100-275000000                d*          r                              opp100-300000000                           r                               opp100-500000000                e           r                    opp100-600000000                #F           r               @      opp120-600000000                #F          O  @                   opp120-720000000                *T          O  @                    oppturbo-720000000              *T          9 p P                   oppturbo-800000000              /          9 p P                    oppnitro-1000000000             ;          7 D L                       pmu@4b000000              arm,cortex-a8-pmu                       K              debugss       soc           ti,omap-infra      mpu           ti,omap3-mpu            mpu                        ocp           simple-bus                       +                    l3_main            \   interconnect@44c00000             ti,am33xx-l4-wkup simple-bus              D     D    D    D            ap la ia0 ia1                        +         $      D        D         D                ]   wkup_m3@100000            ti,am3352-wkup-m3                 @              
  umem dmem           wkup_m3         am335x-pm-firmware.elf             ,      segment@0             simple-bus                       +         0                                              segment@100000            simple-bus                       +         0           @   @  @                          target-module@0           ti,sysc-omap4 ti,sysc                           rev                      +                     @       	  disabled          target-module@80000           ti,sysc       	  disabled                         +                               segment@200000            simple-bus                       +                                   0   0      @   @      P   P      `   `      p   p                                                                       !         "         #        #        #      0  #0     @  #@     P  #P     `  #`     p  #p       #       #       #       #       #                 $         (        target-module@0           ti,sysc-omap4 ti,sysc                           rev                      +                          prcm@0            ti,am3-prcm simple-bus                                        +                                  ^   clocks                       +               _   clk_32768_ck                          fixed-clock                             clk_rc32k_ck                          fixed-clock           }                  virt_19200000_ck                          fixed-clock         $            '      virt_24000000_ck                          fixed-clock         n6            (      virt_25000000_ck                          fixed-clock         }x@           )      virt_26000000_ck                          fixed-clock                    *      tclkin_ck                         fixed-clock                            dpll_core_ck@490                          ti,am3-dpll-core-clock          	   	   	             \  h           
      dpll_core_x2_ck                       ti,am3-dpll-x2-clock            	   
                 dpll_core_m4_ck@480                       ti,divider-clock            	           *                       5                 dpll_core_m5_ck@484                       ti,divider-clock            	           *                       5                 dpll_core_m6_ck@4d8                       ti,divider-clock            	           *                       5           `      dpll_mpu_ck@488                       ti,am3-dpll-clock           	   	   	                ,                 dpll_mpu_m2_ck@4a8                        ti,divider-clock            	           *                       5           a      dpll_ddr_ck@494                       ti,am3-dpll-no-gate-clock           	   	   	             4  @                 dpll_ddr_m2_ck@4a0                        ti,divider-clock            	           *                       5                 dpll_ddr_m2_div2_ck                       fixed-factor-clock          	           L           W              b      dpll_disp_ck@498                          ti,am3-dpll-no-gate-clock           	   	   	             H  T                 dpll_disp_m2_ck@4a4                       ti,divider-clock            	           *                       5         a                 dpll_per_ck@48c                   !    ti,am3-dpll-no-gate-j-type-clock            	   	   	             p                   dpll_per_m2_ck@4ac                        ti,divider-clock            	           *                       5                 dpll_per_m2_div4_wkupdm_ck                        fixed-factor-clock          	           L           W              c      dpll_per_m2_div4_ck                       fixed-factor-clock          	           L           W              d      clk_24mhz                         fixed-factor-clock          	           L           W                    clkdiv32k_ck                          fixed-factor-clock          	           L           W             e      l3_gclk                       fixed-factor-clock          	           L           W                    pruss_ocp_gclk@530                        ti,mux-clock            	                 0           K      mmu_fck@914                       ti,gate-clock           	           t              	           f      timer1_fck@528                        ti,mux-clock            	   	                               (           /      timer2_fck@508                        ti,mux-clock            	      	                                 4      timer3_fck@50c                        ti,mux-clock            	      	                                 g      timer4_fck@510                        ti,mux-clock            	      	                                 h      timer5_fck@518                        ti,mux-clock            	      	                                 i      timer6_fck@51c                        ti,mux-clock            	      	                                 j      timer7_fck@504                        ti,mux-clock            	      	                                 k      usbotg_fck@47c                        ti,gate-clock           	           t              |           l      dpll_core_m4_div2_ck                          fixed-factor-clock          	           L           W                    ieee5000_fck@e4                       ti,gate-clock           	           t                          m      wdt1_fck@538                          ti,mux-clock            	                         8           n      l4_rtc_gclk                       fixed-factor-clock          	           L           W              o      l4hs_gclk                         fixed-factor-clock          	           L           W              p      l3s_gclk                          fixed-factor-clock          	           L           W              q      l4fw_gclk                         fixed-factor-clock          	           L           W              r      l4ls_gclk                         fixed-factor-clock          	           L           W              +      sysclk_div_ck                         fixed-factor-clock          	           L           W              s      cpsw_125mhz_gclk                          fixed-factor-clock          	           L           W              A      cpsw_cpts_rft_clk@520                         ti,mux-clock            	                             B      gpio0_dbclk_mux_ck@53c                        ti,mux-clock            	                            <           t      lcd_gclk@534                          ti,mux-clock            	                    4         a                 mmc_clk                       fixed-factor-clock          	           L           W              u      gfx_fclk_clksel_ck@52c                        ti,mux-clock            	              t              ,                 gfx_fck_div_ck@52c                        ti,divider-clock            	              ,        *              Y      sysclkout_pre_ck@700                          ti,mux-clock            	                                            clkout2_div_ck@700                        ti,divider-clock            	           t           *                                clkout2_ck@700                        ti,gate-clock           	           t                          v         clockdomains               w      per-cm@0              ti,omap4-cm                                      +                                 x   l4ls-clkctrl@38           ti,clkctrl        8      8   ,   l   (                         0                         1      l3s-clkctrl@1c            ti,clkctrl                     0      h                               3      l3-clkctrl@24             ti,clkctrl        (      $                                                 N      l4hs-clkctrl@120              ti,clkctrl                                       y      pruss-ocp-clkctrl@e8              ti,clkctrl                                       I      cpsw-125mhz-clkctrl@0             ti,clkctrl                                        @      lcdc-clkctrl@18           ti,clkctrl                                       ?      clk-24mhz-clkctrl@14c             ti,clkctrl             L                                  wkup-cm@400           ti,omap4-cm                                     +                                z   l4-wkup-clkctrl@0             ti,clkctrl                        $                            l3-aon-clkctrl@14             ti,clkctrl                                       {      l4-wkup-aon-clkctrl@b0            ti,clkctrl                                       |         mpu-cm@600            ti,omap4-cm                                     +                                }   mpu-clkctrl@0             ti,clkctrl                                        ~         l4-rtc-cm@800             ti,omap4-cm                                     +                                   l4-rtc-clkctrl@0              ti,clkctrl                                        0         gfx-l3-cm@900             ti,omap4-cm            	                         +                 	                  gfx-l3-clkctrl@0              ti,clkctrl                                        W         l4-cefuse-cm@a00              ti,omap4-cm            
                         +                 
                  l4-cefuse-clkctrl@0           ti,clkctrl                  $                               prm@c00       !    ti,am3-prm-inst ti,omap-prm-inst                                         J      prm@d00       !    ti,am3-prm-inst ti,omap-prm-inst                                               prm@f00       !    ti,am3-prm-inst ti,omap-prm-inst                                               prm@1100          !    ti,am3-prm-inst ti,omap-prm-inst                                                     X            target-module@3000            ti,sysc       	  disabled                         +                 0          target-module@5000            ti,sysc       	  disabled                         +                 P          target-module@7000            ti,sysc-omap2 ti,sysc              p      p     q           rev sysc syss                                                      	                         
  fck dbclk                        +                 p                  gpio@0            ti,omap4-gpio                      R             4             ^             G                          l             I                          
             J             Q                                                                                   `           %         target-module@9000            ti,sysc-omap2 ti,sysc              P     T     X           rev sysc syss                                           	                  fck                      +                        serial@0              ti,am3352-uart ti,omap3-uart            l                            H        okay               !          !               tx rx           'default         5   "                    target-module@b000            ti,sysc-omap2 ti,sysc                                    rev sysc syss                                                     	                  fck                      +                        i2c@0             ti,omap4-i2c                         +                               F        okay            'default         5   #                       tps@24              $          ti,tps65217                                                     ?           U   charger           ti,tps65217-charger                        [USB AC          okay          pwrbutton             ti,tps65217-pwrbutton                      okay          regulators                       +       regulator@0                      kdcdc1         	  vdds_dpr                              regulator@1                     kdcdc2           vdd_mpu          H         L                                   regulator@2                     kdcdc3         	  vdd_core             H         0                                   regulator@3                     kldo1            vio,vrtc,vdds                             regulator@4                     kldo2            vdd_3v3aux                            regulator@5                     kldo3            vdd_1v8                   w@         w@                 regulator@6                     kldo4          	  vdd_3v3a                                    baseboard_eeprom@50           atmel,24c256                P                     +                 baseboard_data@0                                        usb-hub@2c          'default         5   $          microchip,usb2512b              ,           %                             target-module@d000            ti,sysc-omap4 ti,sysc                             	  rev sysc                                 	                  fck                      +                                 tscadc@0              ti,am3359-tscadc                                     	  disabled               !   5       !   9            fifo0 fifo1               tsc           ti,am3359-tsc         adc                      ti,am3359-adc                          target-module@10000           ti,sysc-omap4 ti,sysc                          rev                      +                                 scm@0             ti,am3-scm simple-bus                                         +                                                pinmux@800            pinctrl-single                8                               0           'default         5   &               user_leds_s0          0  M   T          X         \          `                 Z      pinmux_i2c0_pins            M     0         0               #      pinmux_i2c2_pins            M  x   0     |   0              8      pinmux_uart0_pins           M  p   0      t                   "      pinmux_clkout2_pin          M                    &      cpsw_default            M                                       $         (         ,         0         4         8         <         @                  D      cpsw_sleep          M                                       $         (         ,         0         4         8         <         @                  E      davinci_mdio_default            M  H   0      L                  G      davinci_mdio_sleep          M  H         L                  H      pinmux_mmc1_pins          T  M  `   (         0          0          0          0         0          0               6      pinmux_emmc_pins          x  M      0         0          0         0         0         0         0         0         0         0              ;      usb_hub_ctrl            M  D                 $      pinmux_bb_spi0_pins       0  M  P   (      T   (      X   (      \   (               2         scm_conf@0            syscon simple-bus                                        +                                    phy-gmii-sel              ti,am3352-phy-gmii-sel             P           a              C      clocks                       +                  sys_clkin_ck@40                       ti,mux-clock            	   '   (   )   *        t               @           	      adc_tsc_fck                       fixed-factor-clock          	   	        L           W                    dcan0_fck                         fixed-factor-clock          	   	        L           W              9      dcan1_fck                         fixed-factor-clock          	   	        L           W              :      mcasp0_fck                        fixed-factor-clock          	   	        L           W                    mcasp1_fck                        fixed-factor-clock          	   	        L           W                    smartreflex0_fck                          fixed-factor-clock          	   	        L           W                    smartreflex1_fck                          fixed-factor-clock          	   	        L           W                    sha0_fck                          fixed-factor-clock          	   	        L           W                    aes0_fck                          fixed-factor-clock          	   	        L           W                    rng_fck                       fixed-factor-clock          	   	        L           W                    ehrpwm0_tbclk@44e10664                        ti,gate-clock           	   +        t               d           <      ehrpwm1_tbclk@44e10664                        ti,gate-clock           	   +        t              d           =      ehrpwm2_tbclk@44e10664                        ti,gate-clock           	   +        t              d           >            control@620           ti,am335x-usb-ctrl-module                    H           phy_ctrl wakeup            R      wkup_m3_ipc@1324              ti,am3352-wkup-m3-ipc              $   $           N        l   ,        u   -   .        |am335x-bone-scale-data.bin                   dma-router@f90            ti,am335x-edma-crossbar               @                                  !           5      clockdomains                           target-module@31000           ti,sysc-omap2-timer ti,sysc                               rev sysc syss                                                  	                  fck                      +                                                    timer@0           ti,am335x-timer-1ms                            C                 	   /        fck            /           	                    target-module@33000           ti,sysc       	  disabled                         +                0          target-module@35000           ti,sysc-omap2 ti,sysc             P     P    P           rev sysc syss              "                                        	                  fck                      +                P       wdt@0             ti,omap3-wdt                               [                    target-module@37000           ti,sysc       	  disabled                         +                p          target-module@39000           ti,sysc       	  disabled                         +                          target-module@3e000           ti,sysc-omap4-simple ti,sysc              t    x         	  rev sysc                                 	   0                fck                      +                       rtc@0             ti,am3352-rtc ti,da830-rtc                             K   L        	                      ext-clk int-clk                              target-module@40000           ti,sysc       	  disabled                         +                                 interconnect@48000000             ti,am33xx-l4-per simple-bus       0   H      H     H     H     H     H             ap la ia0 ia1 ia2 ia3                        +         H      H         H         H       0  H0     F   F    @  F@  F@   @                segment@0             simple-bus                       +                                                                                     `  `     p  p              0  0     @  @     P  P                                  @  @     P  P                                             0  0     @  @     P  P     `  `     p  p                                                                             	   	      
   
                                                                                      F   F    @  F@  F@   @     target-module@8000            ti,sysc       	  disabled                         +                           target-module@14000           ti,sysc       	  disabled                         +                @          target-module@16000           ti,sysc       	  disabled                         +                `          target-module@22000           ti,sysc-omap2 ti,sysc              P     T     X           rev sysc syss                                           	   1   4            fck                      +                        serial@0              ti,am3352-uart ti,omap3-uart            l                            I      	  disabled               !          !               tx rx                       target-module@24000           ti,sysc-omap2 ti,sysc             @P    @T    @X           rev sysc syss                                           	   1   8            fck                      +                @       serial@0              ti,am3352-uart ti,omap3-uart            l                            J      	  disabled               !          !               tx rx                       target-module@2a000           ti,sysc-omap2 ti,sysc                                 rev sysc syss                                                     	   1               fck                      +                       i2c@0             ti,omap4-i2c                         +                               G      	  disabled                        target-module@30000           ti,sysc-omap2 ti,sysc                                  rev sysc syss                                                  	   1               fck                      +                        spi@0             ti,omap4-mcspi                       +                               A                 0     !          !          !          !               tx0 rx0 tx1 rx1         okay            'default         5   2              channel@0                        +              micron,spi-authenta                      , $          >            target-module@38000           ti,sysc-omap4-simple ti,sysc                            	  rev sysc                              	   3               fck                      +                     F   F    @     mcasp@0           ti,am33xx-mcasp-audio                    F    @          mpu dat            P   Q        [tx rx         	  disabled               !         !   	           tx rx                       target-module@3c000           ti,sysc-omap4-simple ti,sysc                            	  rev sysc                              	   3   L            fck                      +                     F@  F@   @     mcasp@0           ti,am33xx-mcasp-audio                    F@   @          mpu dat            R   S        [tx rx         	  disabled               !   
      !              tx rx                       target-module@40000           ti,sysc-omap4-timer ti,sysc                                  rev sysc syss                                           	   1   H            fck                      +                                                     timer@0           ti,am335x-timer                            D        	   4        fck            4           	                    target-module@42000           ti,sysc-omap4-timer ti,sysc                                  rev sysc syss                                           	   1   L            fck                      +                        timer@0           ti,am335x-timer                            E                    target-module@44000           ti,sysc-omap4-timer ti,sysc           @     @    @           rev sysc syss                                           	   1   P            fck                      +                @       timer@0           ti,am335x-timer                            \         G                    target-module@46000           ti,sysc-omap4-timer ti,sysc           `     `    `           rev sysc syss                                           	   1               fck                      +                `       timer@0           ti,am335x-timer                            ]         G                    target-module@48000           ti,sysc-omap4-timer ti,sysc                               rev sysc syss                                           	   1               fck                      +                       timer@0           ti,am335x-timer                            ^         G                    target-module@4a000           ti,sysc-omap4-timer ti,sysc                               rev sysc syss                                           	   1   D            fck                      +                       timer@0           ti,am335x-timer                            _         G                    target-module@4c000           ti,sysc-omap2 ti,sysc                                 rev sysc syss                                                      	   1   t       1   t         
  fck dbclk                        +                       gpio@0            ti,omap4-gpio         @                           Z                                                                                                b           [         target-module@50000           ti,sysc       	  disabled                         +                            target-module@60000           ti,sysc-omap2 ti,sysc                                rev sysc syss                                                  	   1               fck                      +                        mmc@0             ti,am335-sdhci           T            5              5                   tx rx              @                        okay            k           'default         5   6        u   %              ~   7                    target-module@80000           ti,sysc-omap2 ti,sysc                                    rev sysc syss                                                  	   1               fck                      +                        elm@0             ti,am3352-elm                                     	  disabled                        target-module@a0000           ti,sysc       	  disabled                         +                
           target-module@c8000           ti,sysc-omap4 ti,sysc                           	  rev sysc                                         	   1               fck                      +                       mailbox@0             ti,omap4-mailbox                               M                                            -   mbox-wkup-m3                                                               .            target-module@ca000           ti,sysc-omap2 ti,sysc                                 rev sysc syss                                                  	   1               fck                      +                       spinlock@0            ti,omap4-hwspinlock                                                target-module@cc000           ti,sysc       	  disabled                         +                             segment@100000            simple-bus                       +        h                               	       	       
`  `     
p  p     
       
       
       
       
       
       
       
                                                                           
         
       
         
0  0     
@  @     
P  P       target-module@8c000           ti,sysc       	  disabled                         +                          target-module@8e000           ti,sysc       	  disabled                         +                          target-module@9c000           ti,sysc-omap2 ti,sysc             	     	    	           rev sysc syss                                                     	   1               fck                      +                	       i2c@0             ti,omap4-i2c                         +                                       okay            'default         5   8                       cape_eeprom0@54           atmel,24c256                T                     +                 cape_data@0                                     cape_eeprom1@55           atmel,24c256                U                     +                 cape_data@0                                     cape_eeprom2@56           atmel,24c256                V                     +                 cape_data@0                                     cape_eeprom3@57           atmel,24c256                W                     +                 cape_data@0                                           target-module@a0000           ti,sysc-omap2 ti,sysc             
      
    
           rev sysc syss                                                  	   1               fck                      +                
        spi@0             ti,omap4-mcspi                       +                               }                 0     !   *       !   +       !   ,       !   -            tx0 rx0 tx1 rx1       	  disabled                        target-module@a2000           ti,sysc       	  disabled                         +                
           target-module@a4000           ti,sysc       	  disabled                         +                
@          target-module@a6000           ti,sysc-omap2 ti,sysc             
`P    
`T    
`X           rev sysc syss                                           	   1   <            fck                      +                
`       serial@0              ti,am3352-uart ti,omap3-uart            l                            ,      	  disabled                        target-module@a8000           ti,sysc-omap2 ti,sysc             
P    
T    
X           rev sysc syss                                           	   1   @            fck                      +                
       serial@0              ti,am3352-uart ti,omap3-uart            l                            -      	  disabled                        target-module@aa000           ti,sysc-omap2 ti,sysc             
P    
T    
X           rev sysc syss                                           	   1                fck                      +                
       serial@0              ti,am3352-uart ti,omap3-uart            l                            .      	  disabled                        target-module@ac000           ti,sysc-omap2 ti,sysc             
     
    
           rev sysc syss                                                      	   1   x       1   x         
  fck dbclk                        +                
       gpio@0            ti,omap4-gpio         0             "             M             8   
                                                                                        target-module@ae000           ti,sysc-omap2 ti,sysc             
     
    
           rev sysc syss                                                      	   1   |       1   |         
  fck dbclk                        +                
                  gpio@0            ti,omap4-gpio         P             B             b             K                          d                                                                      >                    target-module@b0000           ti,sysc       	  disabled                         +                           target-module@cc000           ti,sysc-omap4 ti,sysc                         rev         	   1          9        fck osc                      +                        can@0             ti,am3352-d_can                          	   9        fck              D               4      	  disabled                        target-module@d0000           ti,sysc-omap4 ti,sysc                          rev         	   1          :        fck osc                      +                         can@0             ti,am3352-d_can                          	   :        fck              D              7      	  disabled                        target-module@d8000           ti,sysc-omap2 ti,sysc                                rev sysc syss                                                  	   1               fck                      +                       mmc@0             ti,am335-sdhci           T           !          !               tx rx                                      okay            ~   7        'default         5   ;        k                                    segment@200000            simple-bus                       +         segment@300000            simple-bus                       +               0         0         0       0  00      @  0@      P  0P        0        0       1   @    1        1          1      P  1P     `  1`     p  1p     0  10     @  1@        2        2        2      0  20     @  2@     P  2P       target-module@0           ti,sysc-omap4 ti,sysc                               	  rev sysc                                                      	   1               fck                      +                         epwmss@0              ti,am33xx-pwmss                                      +         	  disabled                                     pwm@100           ti,am3352-ecap                                    	   +        fck       	  disabled                     counter@180           ti,am3352-eqep                        	   +      
  sysclkout              O      	  disabled                     pwm@200           ti,am3352-ehrpwm                                      	   <   +      
  tbclk fck         	  disabled                           target-module@2000            ti,sysc-omap4 ti,sysc                               	  rev sysc                                                      	   1               fck                      +                         epwmss@0              ti,am33xx-pwmss                                      +         	  disabled                                     pwm@100           ti,am3352-ecap                                    	   +        fck       	  disabled                     counter@180           ti,am3352-eqep                        	   +      
  sysclkout              X      	  disabled                     pwm@200           ti,am3352-ehrpwm                                      	   =   +      
  tbclk fck         	  disabled                           target-module@4000            ti,sysc-omap4 ti,sysc              @      @         	  rev sysc                                                      	   1               fck                      +                 @       epwmss@0              ti,am33xx-pwmss                                      +         	  disabled                                     pwm@100           ti,am3352-ecap                                    	   +        fck       	  disabled                     counter@180           ti,am3352-eqep                        	   +      
  sysclkout              Y      	  disabled                     pwm@200           ti,am3352-ehrpwm                                      	   >   +      
  tbclk fck         	  disabled                           target-module@e000            ti,sysc-omap4 ti,sysc                    T         	  rev sysc                                                	   ?                fck                      +                        lcdc@0            ti,am33xx-tilcdc                               $      	  disabled                        target-module@10000           ti,sysc-omap2 ti,sysc                          	  rev sysc                                      	   1   X            fck                      +                         rng@0             ti,omap4-rng                                o                    target-module@13000           ti,sysc       	  disabled                         +                0          target-module@15000           ti,sysc       	  disabled                         +                P        `          target-module@18000           ti,sysc       	  disabled                         +                   @       target-module@20000           ti,sysc       	  disabled                         +                           target-module@22000           ti,sysc       	  disabled                         +                           target-module@24000           ti,sysc       	  disabled                         +                @                interconnect@47c00000             ti,am33xx-l4-fw simple-bus           G     G    G          
  ap la ia0                        +               G                   segment@0             simple-bus                       +                                                                                                          @  @     P  P     `  `     p  p                                                                               `  `     p  p     @  @     P  P                            0  0                            0  0     @  @     P  P       target-module@c000            ti,sysc       	  disabled                         +                           target-module@e000            ti,sysc       	  disabled                         +                           target-module@10000           ti,sysc       	  disabled                         +                           target-module@14000           ti,sysc       	  disabled                         +                @          target-module@1a000           ti,sysc       	  disabled                         +                          target-module@24000           ti,sysc       	  disabled                         +                @          target-module@26000           ti,sysc       	  disabled                         +                `          target-module@28000           ti,sysc       	  disabled                         +                          target-module@30000           ti,sysc       	  disabled                         +                           target-module@32000           ti,sysc       	  disabled                         +                           target-module@38000           ti,sysc       	  disabled                         +                          target-module@3a000           ti,sysc       	  disabled                         +                          target-module@3c000           ti,sysc       	  disabled                         +                          target-module@3e000           ti,sysc       	  disabled                         +                          target-module@40000           ti,sysc       	  disabled                         +                           target-module@42000           ti,sysc       	  disabled                         +                           target-module@44000           ti,sysc       	  disabled                         +                @          target-module@46000           ti,sysc       	  disabled                         +                `                interconnect@4a000000             ti,am33xx-l4-fast simple-bus             J      J     J           
  ap la ia0                        +               J                    segment@0             simple-bus                       +                                                                                      (   (      0   0      8   8        target-module@100000              ti,sysc-omap4-simple ti,sysc                                  rev sysc syss                                                                	   @               fck                      +                        ethernet@0            ti,am335x-cpsw ti,cpsw          	   A   B      	  fck cpts            '           6           B            N            Z           a            n           ~                                              +              (   )   *   +                                    	  disabled                  mdio@1000             ti,cpsw-mdio ti,davinci_mdio            	   @               fck                      +             B@                     	  disabled                     slave@200                              C                       slave@300                              C                          switch@0          %    ti,am335x-cpsw-switch ti,cpsw-switch                   @                   @         	   A        fck                      +                      okay               (   )   *   +        [rx_thresh rx tx misc            'default sleep           5   D           E              ethernet-ports                       +       port@1                      port1                              C                 F      	  rgmii-id                                port@2                      port2                              C            	  disabled                        mdio@1000             ti,cpsw-mdio ti,davinci_mdio            	   A        fck                      +             B@                       'default sleep           5   G           H              ethernet-phy@0                          F         cpts            	   B        cpts                target-module@180000              ti,sysc       	  disabled                         +                           target-module@200000              ti,sysc       	  disabled                         +                            target-module@300000              ti,sysc-pruss ti,sysc             2`     2`         	  rev sysc               0                                            	   I                fck            J           rstctrl                      +                0             okay                  pruss@0           ti,am3356-pruss                                      +                          memories@0                                0         dram0 dram1 shrdram2                     cfg@26000             ti,pruss-cfg syscon           `                          +                `                   clocks                       +       iepclk-mux@30               0                    	      K           M            serial@28000              ti,pruss-uart                 8        	               L      	  disabled                     iep@2e000             ti,am3356-icss-iep                       	   M                 ecap@30000            ti,pruss-ecap                  `                 mii-rt@32000              ti,pruss-mii syscon                X                 interrupt-controller@20000            ti,pruss-intc                                                          X  [host_intr0 host_intr1 host_intr2 host_intr3 host_intr4 host_intr5 host_intr6 host_intr7                                L      pru@34000             ti,am3356-pru             @            $            iram control debug          am335x-pru0-fw              L                         [vring                    pru@38000             ti,am3356-pru                   @     D            iram control debug          am335x-pru1-fw              L                         [vring                    mdio@32400            ti,davinci_mdio           $            	           fck          B@                     +          	  disabled                                 interconnect@4b140000             ti,am33xx-l4-mpuss simple-bus            KD    KH            la ap                        +               K                   segment@0             simple-bus                       +         `    H   H                          @   @      P   P                 0   0                target-module@0           ti,sysc       	  disabled                         +         $                                       target-module@3000            ti,sysc       	  disabled                         +                 0                interrupt-controller@48200000             ti,am33xx-intc                               H                       target-module@49000000            ti,sysc-omap4 ti,sysc            I              rev         	   N               fck                      +               I         dma@0             ti,edma3-tpcc                         	  edma3_cc                           '  [edma3_ccint edma3_mperr edma3_ccerrint             @                       O      P      Q            	                 !         target-module@49800000            ti,sysc-omap4 ti,sysc            I     I          	  rev sysc                                                  	   N                fck                      +               I        dma@0             ti,edma3-tptc                              p        [edma3_tcerrint             O         target-module@49900000            ti,sysc-omap4 ti,sysc            I     I          	  rev sysc                                                  	   N               fck                      +               I        dma@0             ti,edma3-tptc                              q        [edma3_tcerrint             P         target-module@49a00000            ti,sysc-omap4 ti,sysc            I     I          	  rev sysc                                                  	   N               fck                      +               I        dma@0             ti,edma3-tptc                              r        [edma3_tcerrint             Q         target-module@47810000            ti,sysc-omap2 ti,sysc            G   G   G           rev sysc syss                                                  	   3               fck                      +               G        mmc@0             ti,am335-sdhci           T                                 	  disabled                        target-module@47400000            ti,sysc-omap4 ti,sysc            G@     G@          	  rev sysc                                                              	   3                fck                      +               G@                   usb-phy@1300              ti,am335x-usb-phy                          phy         !   R        a               S      usb@1400              ti,musb-am33xx                               mc control                     [mc vbus         -peripheral          5           G           V           f             S     h     T           T          T          T          T          T          T          T          T          T   	       T   
       T          T          T          T          T          T         T         T         T         T         T         T         T         T   	      T   
      T         T         T         T              rx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15         s         U                     usb-phy@1b00              ti,am335x-usb-phy                          phy         !   R        a               V      usb@1800              ti,musb-am33xx                               mc control                     [mc          -host            5           G           V           f             V     h     T          T          T          T          T          T          T          T          T          T          T          T          T          T          T          T         T         T         T         T         T         T         T         T         T         T         T         T         T         T              rx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15                  dma-controller@2000           ti,am3359-cppi41                              0      @   @       #  glue controller scheduler queuemgr                     [glue                                                T         sram@40300000         
    mmio-sram            @0                 @0                          +                 pm-code-sram@0            ti,sram                                           pm-data-sram@1000             ti,sram                                             emif@4c000000             ti,emif-am3352           L              emif               e                                        gpmc@50000000             ti,am3352-gpmc          gpmc                      P                  d           !   4            rxtx                                               +                                                 	  disabled                     target-module@53100000            ti,sysc-omap3-sham ti,sysc           S    S   S           rev sysc syss                                                   	   N   |            fck                      +               S                   sham@0            ti,omap4-sham                              m           !   $            rx          okay                        target-module@53500000            ti,sysc-omap2 ti,sysc            SP    SP    SP            rev sysc syss                                                      	   N   p            fck                      +               SP                   aes@0             ti,omap4-aes                               g           !          !               tx rx           okay                        target-module@56000000            ti,sysc-omap4 ti,sysc            V     V          	  rev sysc                                                	   W               fck            X           X            rstctrl                      +               V         gpu@0             ti,am3352-sgx530 img,sgx530                            %        	   Y        fclk                           memory@80000000          memory                        leds            'default         5   Z      
    gpio-leds      led2            beaglebone:green:heartbeat             [             
  heartbeat           
off       led3            beaglebone:green:mmc0              [               mmc0            
off       led4            beaglebone:green:usr2              [               cpu0            
off       led5            beaglebone:green:usr3              [               mmc1            
off          fixedregulator0           regulator-fixed         vmmcsd_fixed             2Z         2Z           7      __symbols__         /cpus/idle-states/mpu_gate          !/opp-table          0/ocp            4/ocp/interconnect@44c00000        *  </ocp/interconnect@44c00000/wkup_m3@100000         A  D/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0          H  I/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks       U  U/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clk_32768_ck          U  b/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clk_rc32k_ck          Y  o/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/virt_19200000_ck          Y  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/virt_24000000_ck          Y  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/virt_25000000_ck          Y  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/virt_26000000_ck          R  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/tclkin_ck         Y  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_ck@490          X  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_x2_ck       \  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_m4_ck@480       \  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_m5_ck@484       \  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_m6_ck@4d8       X  	
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_mpu_ck@488       [  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_mpu_m2_ck@4a8        X  	%/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_ddr_ck@494       [  	1/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_ddr_m2_ck@4a0        \  	@/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_ddr_m2_div2_ck       Y  	T/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_disp_ck@498          \  	a/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_disp_m2_ck@4a4       X  	q/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_per_ck@48c       [  	}/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_per_m2_ck@4ac        c  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_per_m2_div4_wkupdm_ck        \  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_per_m2_div4_ck       R  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clk_24mhz         U  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clkdiv32k_ck          P  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l3_gclk       [  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/pruss_ocp_gclk@530        T  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/mmu_fck@914       W  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer1_fck@528        W  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer2_fck@508        W  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer3_fck@50c        W  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer4_fck@510        W  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer5_fck@518        W  
(/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer6_fck@51c        W  
3/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer7_fck@504        W  
>/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/usbotg_fck@47c        ]  
I/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_m4_div2_ck          X  
^/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/ieee5000_fck@e4       U  
k/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/wdt1_fck@538          T  
t/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l4_rtc_gclk       R  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l4hs_gclk         Q  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l3s_gclk          R  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l4fw_gclk         R  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l4ls_gclk         V  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/sysclk_div_ck         Y  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/cpsw_125mhz_gclk          ^  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/cpsw_cpts_rft_clk@520         _  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/gpio0_dbclk_mux_ck@53c        U  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/lcd_gclk@534          P  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/mmc_clk       _  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/gfx_fclk_clksel_ck@52c        [  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/gfx_fck_div_ck@52c        ]  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/sysclkout_pre_ck@700          [  //ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clkout2_div_ck@700        W  >/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clkout2_ck@700        N  I/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clockdomains         J  [/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0         Z  b/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/l4ls-clkctrl@38         Y  o/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/l3s-clkctrl@1c          X  {/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/l3-clkctrl@24       [  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/l4hs-clkctrl@120        _  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/pruss-ocp-clkctrl@e8        `  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/cpsw-125mhz-clkctrl@0       Z  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/lcdc-clkctrl@18         `  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/clk-24mhz-clkctrl@14c       M  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/wkup-cm@400          _  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/wkup-cm@400/l4-wkup-clkctrl@0        _  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/wkup-cm@400/l3-aon-clkctrl@14        d  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/wkup-cm@400/l4-wkup-aon-clkctrl@b0       L  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/mpu-cm@600       Z  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/mpu-cm@600/mpu-clkctrl@0         O  &/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/l4-rtc-cm@800        `  0/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/l4-rtc-cm@800/l4-rtc-clkctrl@0       O  ?/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/gfx-l3-cm@900        `  I/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/gfx-l3-cm@900/gfx-l3-clkctrl@0       R  X/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/l4-cefuse-cm@a00         f  e/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/l4-cefuse-cm@a00/l4-cefuse-clkctrl@0         I  w/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00          I  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00          I  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00          J  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100         =  /ocp/interconnect@44c00000/segment@200000/target-module@7000          D  /ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0       F  /ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0         C   I/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0        J  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24         a  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@0          a  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@1          a  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@2          a  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@3          a  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@4          a  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@5          a  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@6          W  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50        h  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50/baseboard_data@0       N  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/usb-hub@2c         F  #/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0         J  */ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0/adc         D  5/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0       O  9/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800        \  G/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/user_leds_s0       `  T/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_i2c0_pins       `  ^/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_i2c2_pins       a  h/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_uart0_pins          b  s/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_clkout2_pin         \  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw_default       Z  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw_sleep         d  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci_mdio_default       b  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci_mdio_sleep         `  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_mmc1_pins       `  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_emmc_pins       \  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/usb_hub_ctrl       c  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_bb_spi0_pins        O  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0        \  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel       V  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks         f  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/sys_clkin_ck@40         b  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/adc_tsc_fck         `  '/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/dcan0_fck       `  1/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/dcan1_fck       a  ;/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/mcasp0_fck          a  F/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/mcasp1_fck          g  Q/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/smartreflex0_fck        g  b/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/smartreflex1_fck        _  s/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/sha0_fck        _  |/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/aes0_fck        ^  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/rng_fck         m  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm0_tbclk@44e10664          m  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm1_tbclk@44e10664          m  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm2_tbclk@44e10664          P  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620       U  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324          S  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90        Q  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/clockdomains          >  /ocp/interconnect@44c00000/segment@200000/target-module@31000         F  /ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0         D   /ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0       D  /ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0         	/ocp/interconnect@48000000        B  /ocp/interconnect@48000000/segment@0/target-module@22000/serial@0         B  /ocp/interconnect@48000000/segment@0/target-module@24000/serial@0         ?   N/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0        ?   /ocp/interconnect@48000000/segment@0/target-module@30000/spi@0        A  /ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0          A  #/ocp/interconnect@48000000/segment@0/target-module@3c000/mcasp@0          9  */ocp/interconnect@48000000/segment@0/target-module@40000          A  8/ocp/interconnect@48000000/segment@0/target-module@40000/timer@0          A  ?/ocp/interconnect@48000000/segment@0/target-module@42000/timer@0          A  F/ocp/interconnect@48000000/segment@0/target-module@44000/timer@0          A  M/ocp/interconnect@48000000/segment@0/target-module@46000/timer@0          A  T/ocp/interconnect@48000000/segment@0/target-module@48000/timer@0          A  [/ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0          @  b/ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0       ?   /ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0        ?  h/ocp/interconnect@48000000/segment@0/target-module@80000/elm@0        C  l/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0        P  t/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0/mbox-wkup-m3       D  /ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0       D   S/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0       T  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54       `  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54/cape_data@0       T  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55       `  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55/cape_data@0       T  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56       `  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56/cape_data@0       T  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57       `  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57/cape_data@0       D   /ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0       G  /ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0        G  /ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0        G  /ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0        E  /ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0          >  /ocp/interconnect@48000000/segment@100000/target-module@ae000         E  /ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0          D  /ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0       D  /ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0       D   /ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0       C  "/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0        K  */ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@100        O  0/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/counter@180        K  6/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@200        F  >/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0         N  F/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@100         R  L/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/counter@180         N  R/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@200         F  Z/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0         N  b/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@100         R  h/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/counter@180         N  n/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@200         D  v/ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0       D  {/ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0         /ocp/interconnect@47c00000          /ocp/interconnect@4a000000        E  /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0          O  /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/mdio@1000        O  /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@200        O  /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@300        C  /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0        Y  /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1          Y  /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2          M  /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000          \  /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000/ethernet-phy@0       :  /ocp/interconnect@4a000000/segment@0/target-module@300000         B  /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0         M  /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/memories@0          L  /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000       a  /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000/clocks/iepclk-mux@30          O  /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/serial@28000        L  (/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/iep@2e000       M  2/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/ecap@30000          O  =/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000        ]  J/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000          L  U/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000       L  Z/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000       M  _/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mdio@32400            j/ocp/interconnect@4b140000        #  P/ocp/interrupt-controller@48200000        "  s/ocp/target-module@49000000/dma@0         "  x/ocp/target-module@49800000/dma@0         "  /ocp/target-module@49900000/dma@0         "  /ocp/target-module@49a00000/dma@0         "  /ocp/target-module@47810000/mmc@0           /ocp/target-module@47400000       )  /ocp/target-module@47400000/usb-phy@1300          %   /ocp/target-module@47400000/usb@1400          )  /ocp/target-module@47400000/usb-phy@1b00          %   /ocp/target-module@47400000/usb@1800          0  /ocp/target-module@47400000/dma-controller@2000         /ocp/sram@40300000        "  /ocp/sram@40300000/pm-code-sram@0         %  /ocp/sram@40300000/pm-data-sram@1000            /ocp/emif@4c000000          /ocp/gpmc@50000000          /ocp/target-module@53100000       #  /ocp/target-module@53100000/sham@0          /ocp/target-module@53500000       "  /ocp/target-module@53500000/aes@0         "  
/ocp/target-module@56000000/gpu@0           /fixedregulator0             	compatible interrupt-parent #address-cells #size-cells model stdout-path i2c0 i2c1 i2c2 serial0 serial1 serial2 serial3 serial4 serial5 d-can0 d-can1 usb0 usb1 phy0 phy1 ethernet0 ethernet1 spi0 spi1 mmc0 mmc1 mmc2 enable-method device_type reg operating-points-v2 clocks clock-names clock-latency cpu-idle-states cpu0-supply entry-latency-us exit-latency-us min-residency-us ti,idle-wkup-m3 phandle syscon opp-hz opp-microvolt opp-supported-hw opp-suspend interrupts ti,hwmods pm-sram ranges reg-names ti,pm-firmware status #clock-cells clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-rate-parent ti,bit-shift #reset-cells #power-domain-cells ti,sysc-mask ti,sysc-sidle ti,syss-mask gpio-ranges gpio-controller #gpio-cells interrupt-controller #interrupt-cells dmas dma-names pinctrl-names pinctrl-0 ti,pmic-shutdown-controller interrupt-names regulator-compatible regulator-name regulator-always-on regulator-min-microvolt regulator-max-microvolt regulator-boot-on reset-gpios #io-channel-cells #pinctrl-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins #phy-cells ti,rproc mboxes ti,scale-data-fw #dma-cells dma-requests dma-masters ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents system-power-controller ti,spi-num-cs spi-max-frequency spi-cpha ti,timer-pwm ti,needs-special-reset bus-width cd-gpios vmmc-supply #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-send-noirq ti,mbox-tx ti,mbox-rx #hwlock-cells syscon-raminit non-removable ti,sysc-midle #pwm-cells cpdma_channels ale_entries bd_ram_size mac_control slaves active_slave cpts_clock_mult cpts_clock_shift bus_freq mac-address phys pinctrl-1 label phy-handle phy-mode ti,dual-emac-pvid resets reset-names firmware-name ti,tptcs ti,edma-memcpy-channels ti,ctrl_mod dr_mode mentor,multipoint mentor,num-eps mentor,ram-bits mentor,power interrupts-extended #dma-channels #dma-requests protect-exec pool ti,no-idle-on-init gpmc,num-cs gpmc,num-waitpins power-domains linux,default-trigger default-state mpu_gate cpu0_opp_table ocp l4_wkup wkup_m3 prcm prcm_clocks clk_32768_ck clk_rc32k_ck virt_19200000_ck virt_24000000_ck virt_25000000_ck virt_26000000_ck tclkin_ck dpll_core_ck dpll_core_x2_ck dpll_core_m4_ck dpll_core_m5_ck dpll_core_m6_ck dpll_mpu_ck dpll_mpu_m2_ck dpll_ddr_ck dpll_ddr_m2_ck dpll_ddr_m2_div2_ck dpll_disp_ck dpll_disp_m2_ck dpll_per_ck dpll_per_m2_ck dpll_per_m2_div4_wkupdm_ck dpll_per_m2_div4_ck clk_24mhz clkdiv32k_ck l3_gclk pruss_ocp_gclk mmu_fck timer1_fck timer2_fck timer3_fck timer4_fck timer5_fck timer6_fck timer7_fck usbotg_fck dpll_core_m4_div2_ck ieee5000_fck wdt1_fck l4_rtc_gclk l4hs_gclk l3s_gclk l4fw_gclk l4ls_gclk sysclk_div_ck cpsw_125mhz_gclk cpsw_cpts_rft_clk gpio0_dbclk_mux_ck lcd_gclk mmc_clk gfx_fclk_clksel_ck gfx_fck_div_ck sysclkout_pre_ck clkout2_div_ck clkout2_ck prcm_clockdomains per_cm l4ls_clkctrl l3s_clkctrl l3_clkctrl l4hs_clkctrl pruss_ocp_clkctrl cpsw_125mhz_clkctrl lcdc_clkctrl clk_24mhz_clkctrl wkup_cm l4_wkup_clkctrl l3_aon_clkctrl l4_wkup_aon_clkctrl mpu_cm mpu_clkctrl l4_rtc_cm l4_rtc_clkctrl gfx_l3_cm gfx_l3_clkctrl l4_cefuse_cm l4_cefuse_clkctrl prm_per prm_wkup prm_device prm_gfx gpio0_target gpio0 uart0 tps dcdc1_reg dcdc2_reg dcdc3_reg ldo1_reg ldo2_reg ldo3_reg ldo4_reg baseboard_eeprom baseboard_data usb2512b tscadc am335x_adc scm am33xx_pinmux user_leds_s0 i2c0_pins i2c2_pins uart0_pins clkout2_pin cpsw_default cpsw_sleep davinci_mdio_default davinci_mdio_sleep mmc1_pins emmc_pins usb_hub_ctrl bb_spi0_pins scm_conf phy_gmii_sel scm_clocks sys_clkin_ck adc_tsc_fck dcan0_fck dcan1_fck mcasp0_fck mcasp1_fck smartreflex0_fck smartreflex1_fck sha0_fck aes0_fck rng_fck ehrpwm0_tbclk ehrpwm1_tbclk ehrpwm2_tbclk usb_ctrl_mod wkup_m3_ipc edma_xbar scm_clockdomains timer1_target timer1 wdt2 rtc l4_per uart1 uart2 mcasp0 mcasp1 timer2_target timer2 timer3 timer4 timer5 timer6 timer7 gpio1 elm mailbox mbox_wkupm3 hwspinlock cape_eeprom0 cape0_data cape_eeprom1 cape1_data cape_eeprom2 cape2_data cape_eeprom3 cape3_data uart3 uart4 uart5 gpio2 gpio3_target gpio3 dcan0 dcan1 epwmss0 ecap0 eqep0 ehrpwm0 epwmss1 ecap1 eqep1 ehrpwm1 epwmss2 ecap2 eqep2 ehrpwm2 lcdc rng l4_fw l4_fast mac davinci_mdio cpsw_emac0 cpsw_emac1 mac_sw cpsw_port1 cpsw_port2 davinci_mdio_sw ethphy0 pruss_tm pruss pruss_mem pruss_cfg pruss_iepclk_mux pruss_uart pruss_iep pruss_ecap pruss_mii_rt pruss_intc pru0 pru1 pruss_mdio l4_mpuss edma edma_tptc0 edma_tptc1 edma_tptc2 mmc3 usb usb0_phy usb1_phy cppi41dma ocmcram pm_sram_code pm_sram_data emif gpmc sham_target sham aes_target aes gpu vmmcsd_fixed 